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mem-ruby: removed checkCoherence from MOESI_CMP_directory

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The implementation is empty and this is not used by other protocols

Change-Id: Iaed7d6d4b7ef1eb4cd47bdc0710dc9dbb7a86a0c
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21923
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Tiago Mück
2019-10-15 16:01:13 -05:00
parent 8213cbcc97
commit daa3dc556e
3 changed files with 0 additions and 11 deletions
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1
src/mem/ruby/protocol/MOESI_CMP_directory-L1cache.sm
View File

@@ -215,7 +215,6 @@ machine(MachineType:L1Cache, "L1 cache protocol")
((cache_entry.CacheState != State:O) && (state == State:O)) ) {
cache_entry.CacheState := state;
sequencer.checkCoherence(addr);
}
else {
cache_entry.CacheState := state;

7
src/mem/ruby/protocol/MOESI_CMP_directory-L2cache.sm
View File

@@ -522,13 +522,6 @@ machine(MachineType:L2Cache, "Token protocol")
(state == State:SLS)) {
assert(is_valid(cache_entry));
assert(L2cache.isTagPresent(addr));
if ( ((cache_entry.CacheState != State:M) && (state == State:M)) ||
((cache_entry.CacheState != State:S) && (state == State:S)) ||
((cache_entry.CacheState != State:O) && (state == State:O)) ) {
// disable Coherence Checker for now
// sequencer.checkCoherence(addr);
}
} else if ( (state == State:ILS) ||
(state == State:ILX) ||
(state == State:ILO) ||

3
src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm
View File

@@ -156,9 +156,6 @@ machine(MachineType:Directory, "Directory protocol")
assert(getDirectoryEntry(addr).Sharers.count() == 0);
directory.deallocate(addr);
// disable coherence checker
// sequencer.checkCoherence(addr);
}
State getState(TBE tbe, Addr addr) {