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ARM: Fix incorrect use of not operators in arm devices

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This commit is contained in:
Ali Saidi
2012-05-10 18:04:27 -05:00
parent 5745665509
commit d9b484b41a
3 changed files with 4 additions and 4 deletions
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2
src/dev/arm/rtc_pl031.cc
View File

@@ -191,7 +191,7 @@ PL031::counterMatch()
rawInt = true;
bool old_pending = pendingInt;
pendingInt = maskInt & rawInt;
if (pendingInt && ~old_pending) {
if (pendingInt && !old_pending) {
DPRINTF(Timer, "-- Causing interrupt\n");
gic->sendInt(intNum);
}

4
src/dev/arm/timer_cpulocal.cc
View File

@@ -291,7 +291,7 @@ CpuLocalTimer::Timer::timerAtZero()
bool old_pending = pendingIntTimer;
if (timerControl.intEnable)
pendingIntTimer = true;
if (pendingIntTimer && ~old_pending) {
if (pendingIntTimer && !old_pending) {
DPRINTF(Timer, "-- Causing interrupt\n");
parent->gic->sendPPInt(intNumTimer, cpuNum);
}
@@ -322,7 +322,7 @@ CpuLocalTimer::Timer::watchdogAtZero()
//XXX: Should we ever support a true watchdog reset?
}
if (pendingIntWatchdog && ~old_pending) {
if (pendingIntWatchdog && !old_pending) {
DPRINTF(Timer, "-- Causing interrupt\n");
parent->gic->sendPPInt(intNumWatchdog, cpuNum);
}

2
src/dev/arm/timer_sp804.cc
View File

@@ -205,7 +205,7 @@ Sp804::Timer::counterAtZero()
bool old_pending = pendingInt;
if (control.intEnable)
pendingInt = true;
if (pendingInt && ~old_pending) {
if (pendingInt && !old_pending) {
DPRINTF(Timer, "-- Causing interrupt\n");
parent->gic->sendInt(intNum);
}