dev-arm: optional instantiation of GICv3 ITS

GICv3 ITS is an optional component of GICv3. The previous behaviour
was for a stub ITS to be created by default, which resulted in a crash
for use cases where a GICv3 with no ITS is required.
This patch removes the instantiation of the ITS by default and adds
checks for its presence both in initialization and device tree
generation code.

Change-Id: Id424924c8c1152d512aaa2837de4aa60329ec234
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22423
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/dev/arm/Gic.py

@@ -203,7 +203,7 @@ class Gicv3(BaseGic):
     # Used for DTB autogeneration
     _state = FdtState(addr_cells=2, size_cells=2, interrupt_cells=3)
 
-    its = Param.Gicv3Its(Gicv3Its(), "GICv3 Interrupt Translation Service")
+    its = Param.Gicv3Its(NULL, "GICv3 Interrupt Translation Service")
 
     dist_addr = Param.Addr("Address for distributor")
     dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
@@ -263,7 +263,8 @@ class Gicv3(BaseGic):
 
         node.appendPhandle(self)
 
-        # Generate the ITS device tree
-        node.append(self.its.generateDeviceTree(self._state))
+        # Generate the ITS device tree if instantiated
+        if self.its != NULL:
+            node.append(self.its.generateDeviceTree(self._state))
 
         yield node

src/dev/arm/gic_v3.cc

@@ -91,7 +91,9 @@ Gicv3::init()
         cpuInterfaces[i]->init();
     }
 
-    params()->its->setGIC(this);
+    Gicv3Its *its = params()->its;
+    if (its)
+        its->setGIC(this);
 
     BaseGic::init();
 }