misc: Delete the now unnecessary create methods.

Most create() methods are no longer necessary. This change deletes them,
and occasionally moves some code from them into the constructors they
call.

Change-Id: Icbab29ba280144b892f9b12fac9e29a0839477e5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36536
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/SConscript

@@ -119,5 +119,4 @@ Source('timing_expr.cc')
 SimObject('DummyChecker.py')
 SimObject('StaticInstFlags.py')
 Source('checker/cpu.cc')
-Source('dummy_checker.cc')
 DebugFlag('Checker')

src/cpu/dummy_checker.cc

@@ -1,52 +0,0 @@
-/*
- * Copyright (c) 2011, 2019 ARM Limited
- * All rights reserved
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder.  You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "cpu/dummy_checker.hh"
-
-#include "params/DummyChecker.hh"
-
-DummyChecker *
-DummyCheckerParams::create() const
-{
-    // The checker should check all instructions executed by the main
-    // cpu and therefore any parameters for early exit don't make much
-    // sense.
-    fatal_if(max_insts_any_thread || max_insts_all_threads ||
-             progress_interval, "Invalid checker parameters");
-
-    return new DummyChecker(*this);
-}

src/cpu/dummy_checker.hh

@@ -39,6 +39,7 @@
 #define __CPU_DUMMY_CHECKER_HH__
 
 #include "cpu/checker/cpu.hh"
+#include "params/DummyChecker.hh"
 
 /**
  * Specific non-templated derived class used for SimObject configuration.
@@ -46,9 +47,15 @@
 class DummyChecker : public CheckerCPU
 {
   public:
-    DummyChecker(const Params &p)
-          : CheckerCPU(p)
-    { }
+    DummyChecker(const Params &p) : CheckerCPU(p)
+    {
+        // The checker should check all instructions executed by the main
+        // cpu and therefore any parameters for early exit don't make much
+        // sense.
+        fatal_if(p.max_insts_any_thread || p.max_insts_all_threads ||
+                 p.progress_interval, "Invalid checker parameters");
+
+    }
 };
 
 #endif // __CPU_DUMMY_CHECKER_HH__

src/cpu/exetrace.cc

@@ -199,13 +199,3 @@ Trace::ExeTracerRecord::dump()
 }
 
 } // namespace Trace
-
-////////////////////////////////////////////////////////////////////////
-//
-//  ExeTracer Simulation Object
-//
-Trace::ExeTracer *
-ExeTracerParams::create() const
-{
-    return new Trace::ExeTracer(*this);
-}

src/cpu/func_unit.cc

@@ -95,38 +95,3 @@ FuncUnit::isPipelined(OpClass capability)
 {
     return pipelined[capability];
 }
-
-////////////////////////////////////////////////////////////////////////////
-//
-//  The SimObjects we use to get the FU information into the simulator
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-//  We use 2 objects to specify this data in the INI file:
-//    (1) OpDesc - Describes the operation class & latencies
-//                   (multiple OpDesc objects can refer to the same
-//                   operation classes)
-//    (2) FUDesc - Describes the operations available in the unit &
-//                   the number of these units
-//
-//
-
-
-//
-//  The operation-class description object
-//
-OpDesc *
-OpDescParams::create() const
-{
-    return new OpDesc(*this);
-}
-
-//
-//  The FuDesc object
-//
-FUDesc *
-FUDescParams::create() const
-{
-    return new FUDesc(*this);
-}

src/cpu/func_unit.hh

@@ -39,6 +39,22 @@
 #include "params/OpDesc.hh"
 #include "sim/sim_object.hh"
 
+////////////////////////////////////////////////////////////////////////////
+//
+//  The SimObjects we use to get the FU information into the simulator
+//
+////////////////////////////////////////////////////////////////////////////
+
+//
+//  We use 2 objects to specify this data in the INI file:
+//    (1) OpDesc - Describes the operation class & latencies
+//                   (multiple OpDesc objects can refer to the same
+//                   operation classes)
+//    (2) FUDesc - Describes the operations available in the unit &
+//                   the number of these units
+//
+//
+
 ////////////////////////////////////////////////////////////////////////////
 //
 //  Structures used ONLY during the initialization phase...

src/cpu/inst_pb_trace.cc

@@ -174,11 +174,3 @@ InstPBTrace::traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f)
 }
 
 } // namespace Trace
-
-
-Trace::InstPBTrace*
-InstPBTraceParams::create() const
-{
-    return new Trace::InstPBTrace(*this);
-}
-

src/cpu/inteltrace.cc

@@ -54,13 +54,3 @@ Trace::IntelTraceRecord::dump()
 }
 
 } // namespace Trace
-
-////////////////////////////////////////////////////////////////////////
-//
-//  ExeTracer Simulation Object
-//
-Trace::IntelTrace *
-IntelTraceParams::create() const
-{
-    return new Trace::IntelTrace(*this);
-}

src/cpu/intr_control.cc

@@ -74,9 +74,3 @@ IntrControl::havePosted(int cpu_id) const
     auto *tc = sys->threads[cpu_id];
     return tc->getCpuPtr()->checkInterrupts(tc->threadId());
 }
-
-IntrControl *
-IntrControlParams::create() const
-{
-    return new IntrControl(*this);
-}

src/cpu/intr_control_noisa.cc

@@ -43,9 +43,3 @@ void
 IntrControl::clear(int cpu_id, int int_num, int index)
 {
 }
-
-IntrControl *
-IntrControlParams::create() const
-{
-    return new IntrControl(*this);
-}

src/cpu/kvm/vm.cc

@@ -64,6 +64,12 @@ Kvm *Kvm::instance = NULL;
 Kvm::Kvm()
     : kvmFD(-1), apiVersion(-1), vcpuMMapSize(0)
 {
+    static bool created = false;
+    if (created)
+        warn_once("Use of multiple KvmVMs is currently untested!");
+
+    created = true;
+
     kvmFD = ::open("/dev/kvm", O_RDWR);
     if (kvmFD == -1)
         fatal("KVM: Failed to open /dev/kvm\n");
@@ -579,16 +585,3 @@ KvmVM::ioctl(int request, long p1) const
 
     return ::ioctl(vmFD, request, p1);
 }
-
-
-KvmVM *
-KvmVMParams::create() const
-{
-    static bool created = false;
-    if (created)
-        warn_once("Use of multiple KvmVMs is currently untested!\n");
-
-    created = true;
-
-    return new KvmVM(*this);
-}

src/cpu/kvm/x86_cpu.cc

@@ -1621,9 +1621,3 @@ X86KvmCPU::setVCpuEvents(const struct kvm_vcpu_events &events)
     if (ioctl(KVM_SET_VCPU_EVENTS, (void *)&events) == -1)
         panic("KVM: Failed to set guest debug registers\n");
 }
-
-X86KvmCPU *
-X86KvmCPUParams::create() const
-{
-    return new X86KvmCPU(*this);
-}

src/cpu/minor/cpu.cc

@@ -291,12 +291,6 @@ MinorCPU::wakeupOnEvent(unsigned int stage_id)
     pipeline->start();
 }
 
-MinorCPU *
-MinorCPUParams::create() const
-{
-    return new MinorCPU(*this);
-}
-
 Port &
 MinorCPU::getInstPort()
 {

src/cpu/minor/func_unit.cc

@@ -44,36 +44,6 @@
 #include "debug/MinorTiming.hh"
 #include "enums/OpClass.hh"
 
-MinorOpClass *
-MinorOpClassParams::create() const
-{
-    return new MinorOpClass(*this);
-}
-
-MinorOpClassSet *
-MinorOpClassSetParams::create() const
-{
-    return new MinorOpClassSet(*this);
-}
-
-MinorFUTiming *
-MinorFUTimingParams::create() const
-{
-    return new MinorFUTiming(*this);
-}
-
-MinorFU *
-MinorFUParams::create() const
-{
-    return new MinorFU(*this);
-}
-
-MinorFUPool *
-MinorFUPoolParams::create() const
-{
-    return new MinorFUPool(*this);
-}
-
 MinorOpClassSet::MinorOpClassSet(const MinorOpClassSetParams &params) :
     SimObject(params),
     opClasses(params.opClasses),

src/cpu/o3/SConscript

@@ -38,7 +38,6 @@ if 'O3CPU' in env['CPU_MODELS']:
     Source('base_dyn_inst.cc')
     Source('commit.cc')
     Source('cpu.cc')
-    Source('deriv.cc')
     Source('decode.cc')
     Source('dyn_inst.cc')
     Source('fetch.cc')

src/cpu/o3/checker.cc

@@ -41,19 +41,6 @@
 #include "cpu/o3/checker.hh"
 
 #include "cpu/checker/cpu_impl.hh"
-#include "params/O3Checker.hh"
 
 template
 class Checker<O3CPUImpl>;
-
-O3Checker *
-O3CheckerParams::create() const
-{
-    // The checker should check all instructions executed by the main
-    // cpu and therefore any parameters for early exit don't make much
-    // sense.
-    fatal_if(max_insts_any_thread || max_insts_all_threads ||
-             progress_interval, "Invalid checker parameters");
-
-    return new O3Checker(*this);
-}

src/cpu/o3/checker.hh

@@ -51,7 +51,14 @@
 class O3Checker : public Checker<O3CPUImpl>
 {
   public:
-    O3Checker(const Params &p) : Checker<O3CPUImpl>(p) {}
+    O3Checker(const Params &p) : Checker<O3CPUImpl>(p)
+    {
+        // The checker should check all instructions executed by the main
+        // cpu and therefore any parameters for early exit don't make much
+        // sense.
+        fatal_if(p.max_insts_any_thread || p.max_insts_all_threads ||
+                 p.progress_interval, "Invalid checker parameters");
+    }
 };
 
 #endif // __CPU_O3_CHECKER_HH__

src/cpu/o3/deriv.cc

@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "cpu/o3/deriv.hh"
-
-#include <string>
-
-#include "params/DerivO3CPU.hh"
-
-DerivO3CPU *
-DerivO3CPUParams::create() const
-{
-    return new DerivO3CPU(*this);
-}

src/cpu/o3/fu_pool.cc

@@ -245,24 +245,3 @@ FUPool::isDrained() const
 
     return is_drained;
 }
-
-//
-
-////////////////////////////////////////////////////////////////////////////
-//
-//  The SimObjects we use to get the FU information into the simulator
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-//    FUPool - Contails a list of FUDesc objects to make available
-//
-
-//
-//  The FuPool object
-//
-FUPool *
-FUPoolParams::create() const
-{
-    return new FUPool(*this);
-}

src/cpu/o3/probe/elastic_trace.cc

@@ -919,9 +919,3 @@ ElasticTrace::flushTraces()
     delete dataTraceStream;
     delete instTraceStream;
 }
-
-ElasticTrace*
-ElasticTraceParams::create() const
-{
-    return new ElasticTrace(*this);
-}

src/cpu/o3/probe/simple_trace.cc

@@ -63,9 +63,3 @@ void SimpleTrace::regProbeListeners()
     listeners.push_back(new DynInstListener(this, "Fetch",
                 &SimpleTrace::traceFetch));
 }
-
-SimpleTrace*
-SimpleTraceParams::create() const
-{
-    return new SimpleTrace(*this);
-}

src/cpu/pred/2bit_local.cc

@@ -133,9 +133,3 @@ void
 LocalBP::uncondBranch(ThreadID tid, Addr pc, void *&bp_history)
 {
 }
-
-LocalBP*
-LocalBPParams::create() const
-{
-    return new LocalBP(*this);
-}

src/cpu/pred/bi_mode.cc

@@ -225,9 +225,3 @@ BiModeBP::updateGlobalHistReg(ThreadID tid, bool taken)
                                (globalHistoryReg[tid] << 1);
     globalHistoryReg[tid] &= historyRegisterMask;
 }
-
-BiModeBP*
-BiModeBPParams::create() const
-{
-    return new BiModeBP(*this);
-}

src/cpu/pred/loop_predictor.cc

@@ -362,9 +362,3 @@ LoopPredictor::getSizeInBits() const
         loopTableConfidenceBits + loopTableTagBits +
         loopTableAgeBits + useDirectionBit);
 }
-
-LoopPredictor *
-LoopPredictorParams::create() const
-{
-    return new LoopPredictor(*this);
-}

src/cpu/pred/ltage.cc

@@ -146,9 +146,3 @@ LTAGE::regStats()
 {
     TAGE::regStats();
 }
-
-LTAGE*
-LTAGEParams::create() const
-{
-    return new LTAGE(*this);
-}

src/cpu/pred/multiperspective_perceptron_64KB.cc

@@ -85,9 +85,3 @@ MultiperspectivePerceptron64KB::createSpecs() {
     addSpec(new SGHISTPATH(1, 2, 5, 1.25, 768, 6, *this));
     addSpec(new SGHISTPATH(1, 5, 2, 1.3125, 972, 6, *this));
 }
-
-MultiperspectivePerceptron64KB*
-MultiperspectivePerceptron64KBParams::create() const
-{
-    return new MultiperspectivePerceptron64KB(*this);
-}

src/cpu/pred/multiperspective_perceptron_8KB.cc

@@ -64,9 +64,3 @@ MultiperspectivePerceptron8KB::createSpecs() {
     addSpec(new SGHISTPATH(0, 4, 3, 1.65625, 0, 6, *this));
     addSpec(new SGHISTPATH(1, 2, 5, 2.53125, 0, 5, *this));
 }
-
-    MultiperspectivePerceptron8KB*
-MultiperspectivePerceptron8KBParams::create() const
-{
-    return new MultiperspectivePerceptron8KB(*this);
-}

src/cpu/pred/multiperspective_perceptron_tage.cc

@@ -242,12 +242,6 @@ MPP_TAGE::isHighConfidence(TAGEBase::BranchInfo *bi) const
 
 }
 
-MPP_TAGE*
-MPP_TAGEParams::create() const
-{
-    return new MPP_TAGE(*this);
-}
-
 bool
 MPP_LoopPredictor::calcConf(int index) const
 {
@@ -261,12 +255,6 @@ MPP_LoopPredictor::optionalAgeInc() const
     return ((random_mt.random<int>() & 7) == 0);
 }
 
-MPP_LoopPredictor*
-MPP_LoopPredictorParams::create() const
-{
-    return new MPP_LoopPredictor(*this);
-}
-
 MPP_StatisticalCorrector::MPP_StatisticalCorrector(
         const MPP_StatisticalCorrectorParams &p) : StatisticalCorrector(p),
     thirdH(0), pnb(p.pnb), logPnb(p.logPnb), pm(p.pm), gnb(p.gnb),

src/cpu/pred/multiperspective_perceptron_tage_64KB.cc

@@ -196,13 +196,6 @@ MPP_StatisticalCorrector_64KB::getSizeInBits() const
     return bits;
 }
 
-MPP_StatisticalCorrector_64KB*
-MPP_StatisticalCorrector_64KBParams::create() const
-{
-    return new MPP_StatisticalCorrector_64KB(*this);
-}
-
-
 MultiperspectivePerceptronTAGE64KB::MultiperspectivePerceptronTAGE64KB(
         const MultiperspectivePerceptronTAGE64KBParams &p)
     : MultiperspectivePerceptronTAGE(p)
@@ -222,9 +215,3 @@ MultiperspectivePerceptronTAGE64KB::createSpecs()
     addSpec(new RECENCY(9, 3, -1, 2.51, 0, 6, *this));
     addSpec(new ACYCLIC(12, -1, -1, 2.0, 0, 6, *this));
 }
-
-MultiperspectivePerceptronTAGE64KB*
-MultiperspectivePerceptronTAGE64KBParams::create() const
-{
-    return new MultiperspectivePerceptronTAGE64KB(*this);
-}

src/cpu/pred/multiperspective_perceptron_tage_8KB.cc

@@ -39,18 +39,6 @@
 
 #include "cpu/pred/multiperspective_perceptron_tage_8KB.hh"
 
-MPP_TAGE_8KB*
-MPP_TAGE_8KBParams::create() const
-{
-    return new MPP_TAGE_8KB(*this);
-}
-
-MPP_LoopPredictor_8KB*
-MPP_LoopPredictor_8KBParams::create() const
-{
-    return new MPP_LoopPredictor_8KB(*this);
-}
-
 MPP_StatisticalCorrector_8KB::MPP_StatisticalCorrector_8KB(
         const MPP_StatisticalCorrector_8KBParams &p)
   : MPP_StatisticalCorrector(p)
@@ -167,12 +155,6 @@ MPP_StatisticalCorrector_8KB::getSizeInBits() const
     return bits;
 }
 
-MPP_StatisticalCorrector_8KB*
-MPP_StatisticalCorrector_8KBParams::create() const
-{
-    return new MPP_StatisticalCorrector_8KB(*this);
-}
-
 MultiperspectivePerceptronTAGE8KB::MultiperspectivePerceptronTAGE8KB(
         const MultiperspectivePerceptronTAGE8KBParams &p)
     : MultiperspectivePerceptronTAGE(p)
@@ -188,9 +170,3 @@ MultiperspectivePerceptronTAGE8KB::createSpecs()
     addSpec(new IMLI(1, 2.23, 0, 6, *this));
     addSpec(new IMLI(4, 1.98, 0, 6, *this));
 }
-
-MultiperspectivePerceptronTAGE8KB*
-MultiperspectivePerceptronTAGE8KBParams::create() const
-{
-    return new MultiperspectivePerceptronTAGE8KB(*this);
-}

src/cpu/pred/simple_indirect.cc

@@ -233,9 +233,3 @@ SimpleIndirectPredictor::getTag(Addr br_addr)
 {
     return (br_addr >> instShift) & ((0x1<<tagBits)-1);
 }
-
-SimpleIndirectPredictor *
-SimpleIndirectPredictorParams::create() const
-{
-    return new SimpleIndirectPredictor(*this);
-}

src/cpu/pred/tage.cc

@@ -125,9 +125,3 @@ TAGE::uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history)
     TageBranchInfo *bi = static_cast<TageBranchInfo*>(bp_history);
     tage->updateHistories(tid, br_pc, true, bi->tageBranchInfo, true);
 }
-
-TAGE*
-TAGEParams::create() const
-{
-    return new TAGE(*this);
-}

src/cpu/pred/tage_base.cc

@@ -790,9 +790,3 @@ TAGEBase::getSizeInBits() const {
     bits += logUResetPeriod;
     return bits;
 }
-
-TAGEBase*
-TAGEBaseParams::create() const
-{
-    return new TAGEBase(*this);
-}

src/cpu/pred/tage_sc_l.cc

@@ -58,12 +58,6 @@ TAGE_SC_L_LoopPredictor::optionalAgeInc() const
     return (random_mt.random<int>() & 7) == 0;
 }
 
-TAGE_SC_L_LoopPredictor *
-TAGE_SC_L_LoopPredictorParams::create() const
-{
-    return new TAGE_SC_L_LoopPredictor(*this);
-}
-
 TAGE_SC_L::TAGE_SC_L(const TAGE_SC_LParams &p)
   : LTAGE(p), statisticalCorrector(p.statistical_corrector)
 {

src/cpu/pred/tage_sc_l_64KB.cc

@@ -190,12 +190,6 @@ TAGE_SC_L_64KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc,
             igehl, inb, logInb, wi, bi);
 }
 
-TAGE_SC_L_64KB_StatisticalCorrector*
-TAGE_SC_L_64KB_StatisticalCorrectorParams::create() const
-{
-    return new TAGE_SC_L_64KB_StatisticalCorrector(*this);
-}
-
 int
 TAGE_SC_L_TAGE_64KB::gindex_ext(int index, int bank) const
 {
@@ -309,19 +303,7 @@ TAGE_SC_L_TAGE_64KB::handleTAGEUpdate(Addr branch_pc, bool taken,
     }
 }
 
-TAGE_SC_L_TAGE_64KB*
-TAGE_SC_L_TAGE_64KBParams::create() const
-{
-    return new TAGE_SC_L_TAGE_64KB(*this);
-}
-
 TAGE_SC_L_64KB::TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams &params)
   : TAGE_SC_L(params)
 {
 }
-
-TAGE_SC_L_64KB*
-TAGE_SC_L_64KBParams::create() const
-{
-    return new TAGE_SC_L_64KB(*this);
-}

src/cpu/pred/tage_sc_l_8KB.cc

@@ -132,12 +132,6 @@ TAGE_SC_L_8KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc, bool taken,
     gUpdate(pc, taken, sh->imliCount, im, igehl, inb, logInb, wi, bi);
 }
 
-TAGE_SC_L_8KB_StatisticalCorrector*
-TAGE_SC_L_8KB_StatisticalCorrectorParams::create() const
-{
-    return new TAGE_SC_L_8KB_StatisticalCorrector(*this);
-}
-
 TAGE_SC_L_8KB::TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams &params)
   : TAGE_SC_L(params)
 {
@@ -316,15 +310,3 @@ TAGE_SC_L_TAGE_8KB::handleTAGEUpdate(Addr branch_pc, bool taken,
             gtable[bi->hitBank][bi->hitBankIndex].u++;
     }
 }
-
-TAGE_SC_L_TAGE_8KB*
-TAGE_SC_L_TAGE_8KBParams::create() const
-{
-    return new TAGE_SC_L_TAGE_8KB(*this);
-}
-
-TAGE_SC_L_8KB*
-TAGE_SC_L_8KBParams::create() const
-{
-    return new TAGE_SC_L_8KB(*this);
-}

src/cpu/pred/tournament.cc

@@ -343,12 +343,6 @@ TournamentBP::squash(ThreadID tid, void *bp_history)
     delete history;
 }
 
-TournamentBP*
-TournamentBPParams::create() const
-{
-    return new TournamentBP(*this);
-}
-
 #ifdef DEBUG
 int
 TournamentBP::BPHistory::newCount = 0;

src/cpu/simple/atomic.cc

@@ -771,13 +771,3 @@ AtomicSimpleCPU::printAddr(Addr a)
 {
     dcachePort.printAddr(a);
 }
-
-////////////////////////////////////////////////////////////////////////
-//
-//  AtomicSimpleCPU Simulation Object
-//
-AtomicSimpleCPU *
-AtomicSimpleCPUParams::create() const
-{
-    return new AtomicSimpleCPU(*this);
-}

src/cpu/simple/noncaching.cc

@@ -42,6 +42,9 @@
 NonCachingSimpleCPU::NonCachingSimpleCPU(const NonCachingSimpleCPUParams &p)
     : AtomicSimpleCPU(p)
 {
+    assert(p.numThreads == 1);
+    fatal_if(!FullSystem && p.workload.size() != 1,
+             "only one workload allowed");
 }
 
 void
@@ -63,12 +66,3 @@ NonCachingSimpleCPU::sendPacket(RequestPort &port, const PacketPtr &pkt)
         return port.sendAtomic(pkt);
     }
 }
-
-NonCachingSimpleCPU *
-NonCachingSimpleCPUParams::create() const
-{
-    assert(numThreads == 1);
-    if (!FullSystem && workload.size() != 1)
-        fatal("only one workload allowed");
-    return new NonCachingSimpleCPU(*this);
-}

src/cpu/simple/probes/simpoint.cc

@@ -138,10 +138,3 @@ SimPoint::profile(const std::pair<SimpleThread*, StaticInstPtr>& p)
         }
     }
 }
-
-/** SimPoint SimObject */
-SimPoint*
-SimPointParams::create() const
-{
-    return new SimPoint(*this);
-}

src/cpu/simple/timing.cc

@@ -1290,14 +1290,3 @@ TimingSimpleCPU::htmSendAbortSignal(HtmFailureFaultCause cause)
 
     sendData(req, data, nullptr, true);
 }
-
-
-////////////////////////////////////////////////////////////////////////
-//
-//  TimingSimpleCPU Simulation Object
-//
-TimingSimpleCPU *
-TimingSimpleCPUParams::create() const
-{
-    return new TimingSimpleCPU(*this);
-}

src/cpu/testers/directedtest/InvalidateGenerator.cc

@@ -133,9 +133,3 @@ InvalidateGenerator::performCallback(uint32_t proc, Addr address)
     }
 
 }
-
-InvalidateGenerator *
-InvalidateGeneratorParams::create() const
-{
-    return new InvalidateGenerator(*this);
-}

src/cpu/testers/directedtest/RubyDirectedTester.cc

@@ -136,9 +136,3 @@ RubyDirectedTester::wakeup()
         exitSimLoop("Ruby DirectedTester completed");
     }
 }
-
-RubyDirectedTester *
-RubyDirectedTesterParams::create() const
-{
-    return new RubyDirectedTester(*this);
-}

src/cpu/testers/directedtest/SeriesRequestGenerator.cc

@@ -108,9 +108,3 @@ SeriesRequestGenerator::performCallback(uint32_t proc, Addr address)
         m_active_node = 0;
     }
 }
-
-SeriesRequestGenerator *
-SeriesRequestGeneratorParams::create() const
-{
-    return new SeriesRequestGenerator(*this);
-}

src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc

@@ -348,10 +348,3 @@ GarnetSyntheticTraffic::printAddr(Addr a)
 {
     cachePort.printAddr(a);
 }
-
-
-GarnetSyntheticTraffic *
-GarnetSyntheticTrafficParams::create() const
-{
-    return new GarnetSyntheticTraffic(*this);
-}

src/cpu/testers/memtest/memtest.cc

@@ -321,9 +321,3 @@ MemTest::recvRetry()
         reschedule(noRequestEvent, clockEdge(progressCheck), true);
     }
 }
-
-MemTest *
-MemTestParams::create() const
-{
-    return new MemTest(*this);
-}

src/cpu/testers/rubytest/RubyTester.cc

@@ -278,9 +278,3 @@ RubyTester::print(std::ostream& out) const
 {
     out << "[RubyTester]" << std::endl;
 }
-
-RubyTester *
-RubyTesterParams::create() const
-{
-    return new RubyTester(*this);
-}

src/cpu/testers/traffic_gen/pygen.cc

@@ -90,9 +90,3 @@ pybind_init_tracers(py::module &m_native)
 
 static EmbeddedPyBind _py_tracers("trace", pybind_init_tracers);
 
-PyTrafficGen*
-PyTrafficGenParams::create() const
-{
-    return new PyTrafficGen(*this);
-}
-

src/cpu/testers/traffic_gen/traffic_gen.cc

@@ -58,12 +58,6 @@ TrafficGen::TrafficGen(const TrafficGenParams &p)
 {
 }
 
-TrafficGen*
-TrafficGenParams::create() const
-{
-    return new TrafficGen(*this);
-}
-
 void
 TrafficGen::init()
 {

src/cpu/timing_expr.cc

@@ -197,51 +197,3 @@ uint64_t TimingExprIf::eval(TimingExprEvalContext &context)
     else
         return falseExpr->eval(context);
 }
-
-TimingExprLiteral *
-TimingExprLiteralParams::create() const
-{
-    return new TimingExprLiteral(*this);
-}
-
-TimingExprSrcReg *
-TimingExprSrcRegParams::create() const
-{
-    return new TimingExprSrcReg(*this);
-}
-
-TimingExprReadIntReg *
-TimingExprReadIntRegParams::create() const
-{
-    return new TimingExprReadIntReg(*this);
-}
-
-TimingExprLet *
-TimingExprLetParams::create() const
-{
-    return new TimingExprLet(*this);
-}
-
-TimingExprRef *
-TimingExprRefParams::create() const
-{
-    return new TimingExprRef(*this);
-}
-
-TimingExprUn *
-TimingExprUnParams::create() const
-{
-    return new TimingExprUn(*this);
-}
-
-TimingExprBin *
-TimingExprBinParams::create() const
-{
-    return new TimingExprBin(*this);
-}
-
-TimingExprIf *
-TimingExprIfParams::create() const
-{
-    return new TimingExprIf(*this);
-}

src/cpu/trace/trace_cpu.cc

@@ -82,12 +82,6 @@ TraceCPU::~TraceCPU()
 
 }
 
-TraceCPU*
-TraceCPUParams::create() const
-{
-    return new TraceCPU(*this);
-}
-
 void
 TraceCPU::updateNumOps(uint64_t rob_num)
 {