arch-arm: Replace CRYPTO extension with canonical names (#810)
These are: FEAT_AES, FEAT_PMULL, FEAT_SHA256, FEAT_SHA1, FEAT_CRC32 With this patch we are also enabling them by default by adding them to the Armv8 release object. Some of them are mandatory anyway since Armv8.1 Change-Id: I221ae8646d91151fdfaf97a4815168a4fe3d8c5a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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@@ -1,4 +1,4 @@
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# Copyright (c) 2012-2013, 2015-2022 ARM Limited
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# Copyright (c) 2012-2013, 2015-2022, 2024 Arm Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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@@ -52,7 +52,11 @@ class DecoderFlavor(Enum):
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class ArmDefaultSERelease(ArmRelease):
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extensions = [
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"CRYPTO",
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"FEAT_AES",
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"FEAT_PMULL",
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"FEAT_SHA1",
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"FEAT_SHA256",
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"FEAT_CRC32",
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# Armv8.1
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"FEAT_LSE",
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"FEAT_RDM",
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@@ -1,4 +1,4 @@
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# Copyright (c) 2009, 2012-2013, 2015-2023 Arm Limited
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# Copyright (c) 2009, 2012-2013, 2015-2024 Arm Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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@@ -65,6 +65,11 @@ class SmeVectorLength(UInt8):
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class ArmExtension(ScopedEnum):
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vals = [
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"FEAT_AES",
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"FEAT_PMULL",
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"FEAT_SHA1",
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"FEAT_SHA256",
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"FEAT_CRC32",
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# Armv8.1
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"FEAT_VHE",
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"FEAT_PAN",
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@@ -109,7 +114,6 @@ class ArmExtension(ScopedEnum):
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"SECURITY",
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"LPAE",
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"VIRTUALIZATION",
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"CRYPTO",
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"TME",
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]
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@@ -159,7 +163,16 @@ class ArmRelease(SimObject):
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class Armv8(ArmRelease):
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extensions = ["LPAE", "VIRTUALIZATION", "SECURITY"]
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extensions = [
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"LPAE",
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"VIRTUALIZATION",
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"SECURITY",
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"FEAT_AES",
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"FEAT_PMULL",
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"FEAT_SHA1",
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"FEAT_SHA256",
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"FEAT_CRC32",
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]
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class ArmDefaultRelease(Armv8):
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2010-2013, 2015-2023 Arm Limited
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* Copyright (c) 2010-2013, 2015-2024 Arm Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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@@ -3181,17 +3181,12 @@ ISA::initializeMiscRegMetadata()
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InitReg(MISCREG_ID_ISAR5)
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.reset([p,release=release] () {
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ISAR5 isar5 = p.id_isar5;
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if (release->has(ArmExtension::CRYPTO)) {
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isar5.crc32 = 1;
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isar5.sha2 = 1;
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isar5.sha1 = 1;
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isar5.aes = 2;
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} else {
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isar5.crc32 = 0;
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isar5.sha2 = 0;
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isar5.sha1 = 0;
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isar5.aes = 0;
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}
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isar5.crc32 = release->has(ArmExtension::FEAT_CRC32) ? 0x1 : 0x0;
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isar5.sha2 = release->has(ArmExtension::FEAT_SHA256) ? 0x1 : 0x0;
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isar5.sha1 = release->has(ArmExtension::FEAT_SHA1) ? 0x1 : 0x0;
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isar5.aes = release->has(ArmExtension::FEAT_PMULL) ?
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0x2 : release->has(ArmExtension::FEAT_AES) ?
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0x1 : 0x0;
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isar5.rdm = release->has(ArmExtension::FEAT_RDM) ? 0x1 : 0x0;
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isar5.vcma = release->has(ArmExtension::FEAT_FCMA) ? 0x1 : 0x0;
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return isar5;
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@@ -4451,17 +4446,12 @@ ISA::initializeMiscRegMetadata()
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InitReg(MISCREG_ID_AA64ISAR0_EL1)
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.reset([p,release=release](){
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AA64ISAR0 isar0_el1 = p.id_aa64isar0_el1;
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if (release->has(ArmExtension::CRYPTO)) {
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isar0_el1.crc32 = 1;
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isar0_el1.sha2 = 1;
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isar0_el1.sha1 = 1;
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isar0_el1.aes = 2;
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} else {
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isar0_el1.crc32 = 0;
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isar0_el1.sha2 = 0;
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isar0_el1.sha1 = 0;
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isar0_el1.aes = 0;
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}
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isar0_el1.crc32 = release->has(ArmExtension::FEAT_CRC32) ? 0x1 : 0x0;
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isar0_el1.sha2 = release->has(ArmExtension::FEAT_SHA256) ? 0x1 : 0x0;
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isar0_el1.sha1 = release->has(ArmExtension::FEAT_SHA1) ? 0x1 : 0x0;
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isar0_el1.aes = release->has(ArmExtension::FEAT_PMULL) ?
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0x2 : release->has(ArmExtension::FEAT_AES) ?
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0x1 : 0x0;
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isar0_el1.dp = release->has(ArmExtension::FEAT_DOTPROD) ? 0x1 : 0x0;
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isar0_el1.atomic = release->has(ArmExtension::FEAT_LSE) ? 0x2 : 0x0;
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isar0_el1.rdm = release->has(ArmExtension::FEAT_RDM) ? 0x1 : 0x0;
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