Add a little more tracing support for Bus/Port stuff.

src/base/traceflags.py:
    Sort flags so you can find things.
    Add BusAddrRanges flag for tracking RangeChange events
    separately from general bus activity.
src/mem/bus.cc:
    Add BusAddrRanges flag for tracking RangeChange events
    separately from general bus activity.
src/mem/port.cc:
src/mem/port.hh:
    Print Config trace message when peers are set up.

--HG--
extra : convert_revision : d7c11d5f90c8de5c8d97e473501a268a567e9e44
This commit is contained in:
Steve Reinhardt
2006-05-26 14:24:46 -04:00
parent e533fad711
commit cdad113afb
4 changed files with 97 additions and 87 deletions

View File

@@ -45,105 +45,107 @@ ccfilename = sys.argv[1] + '.cc'
# To define a new flag, simply add it to this list.
#
baseFlags = [
'TCPIP',
'Bus',
'ScsiDisk',
'ScsiCtrl',
'ScsiNone',
'DMA',
'DMAReadVerbose',
'DMAWriteVerbose',
'TLB',
'SimpleDisk',
'SimpleDiskData',
'Clock',
'Regs',
'MC146818',
'IPI',
'Timer',
'Mbox',
'PCIA',
'PCIDEV',
'PciConfigAll',
'ISP',
'AlphaConsole',
'BADADDR',
'BPredRAS',
'Bus',
'BusAddrRanges',
'BusBridge',
'Cache',
'Chains',
'Clock',
'Commit',
'CommitRate',
'Config',
'Console',
'ConsolePoll',
'ConsoleVerbose',
'AlphaConsole',
'Flow',
'Interrupt',
'Fault',
'Context',
'Cycle',
'Loader',
'MMU',
'DMA',
'DMAReadVerbose',
'DMAWriteVerbose',
'DebugPrintf',
'Decode',
'DiskImage',
'DiskImageRead',
'DiskImageWrite',
'DynInst',
'Ethernet',
'EthernetPIO',
'EthernetCksum',
'EthernetDMA',
'EthernetData',
'EthernetDesc',
'EthernetIntr',
'EthernetPIO',
'EthernetSM',
'EthernetCksum',
'GDBMisc',
'GDBAcc',
'GDBRead',
'GDBWrite',
'GDBSend',
'GDBRecv',
'GDBExtra',
'VtoPhys',
'Printf',
'DebugPrintf',
'Serialize',
'Event',
'PCEvent',
'Syscall',
'SyscallVerbose',
'DiskImage',
'DiskImageRead',
'DiskImageWrite',
'InstExec',
'BPredRAS',
'Cache',
'Fault',
'Fetch',
'Flow',
'FreeList',
'FullCPU',
'GDBAcc',
'GDBExtra',
'GDBMisc',
'GDBRead',
'GDBRecv',
'GDBSend',
'GDBWrite',
'HWPrefetch',
'IEW',
'IIC',
'IICMore',
'MSHR',
'Chains',
'Pipeline',
'Stats',
'StatEvents',
'Context',
'Config',
'Sampler',
'WriteBarrier',
'IPI',
'IQ',
'ISP',
'IdeCtrl',
'IdeDisk',
'InstExec',
'Interrupt',
'LDSTQ',
'Loader',
'MC146818',
'MMU',
'MSHR',
'Mbox',
'MemDepUnit',
'OoOCPU',
'PCEvent',
'PCIA',
'PCIDEV',
'PciConfigAll',
'Pipeline',
'Printf',
'ROB',
'Regs',
'Rename',
'RenameMap',
'SQL',
'Sampler',
'ScsiCtrl',
'ScsiDisk',
'ScsiNone',
'Serialize',
'SimpleCPU',
'SimpleDisk',
'SimpleDiskData',
'Sparc',
'Split',
'Stack',
'StatEvents',
'Stats',
'StoreSet',
'Syscall',
'SyscallVerbose',
'TCPIP',
'TLB',
'Thread',
'Timer',
'Tsunami',
'Uart',
'Split',
'SQL',
'Thread',
'Fetch',
'Decode',
'Rename',
'IEW',
'Commit',
'IQ',
'ROB',
'FreeList',
'RenameMap',
'LDSTQ',
'StoreSet',
'MemDepUnit',
'DynInst',
'FullCPU',
'CommitRate',
'OoOCPU',
'HWPrefetch',
'Stack',
'SimpleCPU',
'Sparc',
'VtoPhys',
'WriteBarrier',
]
#

View File

@@ -130,7 +130,7 @@ Bus::recvStatusChange(Port::Status status, int id)
assert(status == Port::RangeChange &&
"The other statuses need to be implemented.");
DPRINTF(Bus, "received RangeChange from device id %d\n", id);
DPRINTF(BusAddrRanges, "received RangeChange from device id %d\n", id);
assert(id < interfaces.size() && id >= 0);
int x;
@@ -157,7 +157,7 @@ Bus::recvStatusChange(Port::Status status, int id)
dm.portId = id;
dm.range = *iter;
DPRINTF(Bus, "Adding range %llx - %llx for id %d\n",
DPRINTF(BusAddrRanges, "Adding range %llx - %llx for id %d\n",
dm.range.start, dm.range.end, id);
portList.push_back(dm);
}
@@ -178,11 +178,11 @@ Bus::addressRanges(AddrRangeList &resp, AddrRangeList &snoop, int id)
resp.clear();
snoop.clear();
DPRINTF(Bus, "received address range request, returning:\n");
DPRINTF(BusAddrRanges, "received address range request, returning:\n");
for (portIter = portList.begin(); portIter != portList.end(); portIter++) {
if (portIter->portId != id) {
resp.push_back(portIter->range);
DPRINTF(Bus, " -- %#llX : %#llX\n",
DPRINTF(BusAddrRanges, " -- %#llX : %#llX\n",
portIter->range.start, portIter->range.end);
}
}

View File

@@ -31,9 +31,17 @@
*/
#include "base/chunk_generator.hh"
#include "base/trace.hh"
#include "mem/packet_impl.hh"
#include "mem/port.hh"
void
Port::setPeer(Port *port)
{
DPRINTF(Config, "setting peer to %s\n", port->name());
peer = port;
}
void
Port::blobHelper(Addr addr, uint8_t *p, int size, Packet::Command cmd)
{

View File

@@ -112,9 +112,9 @@ class Port
/** Function to set the pointer for the peer port.
@todo should be called by the configuration stuff (python).
*/
void setPeer(Port *port) { peer = port; }
void setPeer(Port *port);
/** Function to set the pointer for the peer port.
/** Function to set the pointer for the peer port.
@todo should be called by the configuration stuff (python).
*/
Port *getPeer() { return peer; }