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cpu: Move numInsts, numOps, ipc, cpi to BaseCPU

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In BaseCPU::BaseCPUStats, numInsts and numOps track per CPU core
committed instructions and operations.

In BaseCPU::FetchCPUStats, numInsts and numOps track per thread
fetched instructions and operations.

In BaseCPU::CommitCPUStats, numInsts and numOps track per thread
committed instructions and operations.

In BaseSimpleCPU, the countInst() function has been split into
countInst(), countFetchInst(), and countCommitInst(). The stat count
incrementation of countInst() has been removed and delegated to the
other two functions. countFetchInst() increments numInsts and numOps
of the FetchCPUStats group for a thread. countCommitInst() increments
the numInsts and numOps of the CommitCPUStats group for a thread and
of the BaseCPUStats group for a CPU core. These functions are called
in the appropriate stage within timing.cc and atomic.cc. The call to
countInst() is left unchanged. countFetchInst() is called in
preExecute(). countCommitInst() is called in postExecute().

For MinorCPU, only the commit level numInsts and numOps stats have been
implemented.

IPC and CPI stats have been added to BaseCPUStats (core level) and
CommitCPUStats (thread level). The formulas for the IPC and CPI stats
in CommitCPUStats are set in the BaseCPU constructor, after the
CommitCPUStats stat group object has been created.

Change-Id: If893b331fe4a6908e4b4caf4a30f1b0aeb4c4266
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67392
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
This commit is contained in:
Melissa Jost
2023-01-19 01:40:36 -08:00
committed by Bobby Bruce
parent e85cf4f717
commit c7b6e78099
8 changed files with 100 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
src/cpu/base.cc
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@@ -198,7 +198,11 @@ BaseCPU::BaseCPU(const Params &p, bool is_checker)
for (int i = 0; i < numThreads; i++) {
fetchStats.emplace_back(new FetchCPUStats(this, i));
executeStats.emplace_back(new ExecuteCPUStats(this, i));
commitStats.emplace_back(new CommitCPUStats(this, i));
// create commitStat object for thread i and set ipc, cpi formulas
CommitCPUStats* commitStatptr = new CommitCPUStats(this, i);
commitStatptr->ipc = commitStatptr->numInsts / baseStats.numCycles;
commitStatptr->cpi = baseStats.numCycles / commitStatptr->numInsts;
commitStats.emplace_back(commitStatptr);
}
}
@@ -392,13 +396,28 @@ BaseCPU::probeInstCommit(const StaticInstPtr &inst, Addr pc)
BaseCPU::
BaseCPUStats::BaseCPUStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed (core level)"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed (core level)"),
ADD_STAT(numCycles, statistics::units::Cycle::get(),
"Number of cpu cycles simulated"),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: cycles per instruction (core level)"),
ADD_STAT(ipc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: instructions per cycle (core level)"),
ADD_STAT(numWorkItemsStarted, statistics::units::Count::get(),
"Number of work items this cpu started"),
ADD_STAT(numWorkItemsCompleted, statistics::units::Count::get(),
"Number of work items this cpu completed")
{
cpi.precision(6);
cpi = numCycles / numInsts;
ipc.precision(6);
ipc = numInsts / numCycles;
}
void
@@ -839,6 +858,10 @@ BaseCPU::GlobalStats::GlobalStats(statistics::Group *parent)
BaseCPU::
FetchCPUStats::FetchCPUStats(statistics::Group *parent, int thread_id)
: statistics::Group(parent, csprintf("fetchStats%i", thread_id).c_str()),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions fetched (thread level)"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) fetched (thread level)"),
ADD_STAT(numBranches, statistics::units::Count::get(),
"Number of branches fetched"),
ADD_STAT(numFetchSuspends, statistics::units::Count::get(),
@@ -927,6 +950,16 @@ ExecuteCPUStats::ExecuteCPUStats(statistics::Group *parent, int thread_id)
BaseCPU::
CommitCPUStats::CommitCPUStats(statistics::Group *parent, int thread_id)
: statistics::Group(parent, csprintf("commitStats%i", thread_id).c_str()),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed (thread level)"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed (thread level)"),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: cycles per instruction (thread level)"),
ADD_STAT(ipc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: instructions per cycle (thread level)"),
ADD_STAT(numMemRefs, statistics::units::Count::get(),
"Number of memory references committed"),
ADD_STAT(numFpInsts, statistics::units::Count::get(),
@@ -944,6 +977,9 @@ CommitCPUStats::CommitCPUStats(statistics::Group *parent, int thread_id)
ADD_STAT(committedControl, statistics::units::Count::get(),
"Class of control type instructions committed")
{
cpi.precision(6);
ipc.precision(6);
committedInstType
.init(enums::Num_OpClass)
.flags(statistics::total | statistics::pdf | statistics::dist);

20
src/cpu/base.hh
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@@ -633,8 +633,14 @@ class BaseCPU : public ClockedObject
struct BaseCPUStats : public statistics::Group
{
BaseCPUStats(statistics::Group *parent);
// Number of CPU insts and ops committed at CPU core level
statistics::Scalar numInsts;
statistics::Scalar numOps;
// Number of CPU cycles simulated
statistics::Scalar numCycles;
/* CPI/IPC for total cycle counts and macro insts */
statistics::Formula cpi;
statistics::Formula ipc;
statistics::Scalar numWorkItemsStarted;
statistics::Scalar numWorkItemsCompleted;
} baseStats;
@@ -683,6 +689,12 @@ class BaseCPU : public ClockedObject
{
FetchCPUStats(statistics::Group *parent, int thread_id);
/* Total number of instructions fetched */
statistics::Scalar numInsts;
/* Total number of operations fetched */
statistics::Scalar numOps;
/* Total number of branches fetched */
statistics::Scalar numBranches;
@@ -742,6 +754,14 @@ class BaseCPU : public ClockedObject
{
CommitCPUStats(statistics::Group *parent, int thread_id);
/* Number of simulated instructions committed */
statistics::Scalar numInsts;
statistics::Scalar numOps;
/* CPI/IPC for total cycle counts and macro insts */
statistics::Formula cpi;
statistics::Formula ipc;
/* Number of committed memory references. */
statistics::Scalar numMemRefs;

6
src/cpu/minor/execute.cc
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@@ -871,14 +871,16 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst)
{
thread->numInst++;
thread->threadStats.numInsts++;
cpu.stats.numInsts++;
cpu.commitStats[inst->id.threadId]->numInsts++;
cpu.baseStats.numInsts++;
/* Act on events related to instruction counts */
thread->comInstEventQueue.serviceEvents(thread->numInst);
}
thread->numOp++;
thread->threadStats.numOps++;
cpu.stats.numOps++;
cpu.commitStats[inst->id.threadId]->numOps++;
cpu.baseStats.numOps++;
cpu.commitStats[inst->id.threadId]
->committedInstType[inst->staticInst->opClass()]++;

18
src/cpu/minor/stats.cc
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@@ -45,29 +45,13 @@ namespace minor
MinorStats::MinorStats(BaseCPU *base_cpu)
: statistics::Group(base_cpu),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed"),
ADD_STAT(quiesceCycles, statistics::units::Cycle::get(),
"Total number of cycles that CPU has spent quiesced or waiting "
"for an interrupt"),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: cycles per instruction"),
ADD_STAT(ipc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: instructions per cycle")
"for an interrupt")
{
quiesceCycles.prereq(quiesceCycles);
cpi.precision(6);
cpi = base_cpu->baseStats.numCycles / numInsts;
ipc.precision(6);
ipc = numInsts / base_cpu->baseStats.numCycles;
}
} // namespace minor

10
src/cpu/minor/stats.hh
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@@ -59,19 +59,9 @@ struct MinorStats : public statistics::Group
{
MinorStats(BaseCPU *parent);
/** Number of simulated instructions */
statistics::Scalar numInsts;
/** Number of simulated insts and microops */
statistics::Scalar numOps;
/** Number of cycles in quiescent state */
statistics::Scalar quiesceCycles;
/** CPI/IPC for total cycle counts and macro insts */
statistics::Formula cpi;
statistics::Formula ipc;
};
} // namespace minor

38
src/cpu/simple/base.cc
View File

@@ -154,10 +154,36 @@ BaseSimpleCPU::countInst()
if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
t_info.numInst++;
t_info.execContextStats.numInsts++;
}
t_info.numOp++;
t_info.execContextStats.numOps++;
}
void
BaseSimpleCPU::countFetchInst()
{
SimpleExecContext& t_info = *threadInfo[curThread];
if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
// increment thread level numInsts fetched count
fetchStats[t_info.thread->threadId()]->numInsts++;
}
// increment thread level numOps fetched count
fetchStats[t_info.thread->threadId()]->numOps++;
}
void
BaseSimpleCPU::countCommitInst()
{
SimpleExecContext& t_info = *threadInfo[curThread];
if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
// increment thread level and core level numInsts count
commitStats[t_info.thread->threadId()]->numInsts++;
baseStats.numInsts++;
}
// increment thread level and core level numOps count
commitStats[t_info.thread->threadId()]->numOps++;
baseStats.numOps++;
}
Counter
@@ -376,6 +402,11 @@ BaseSimpleCPU::preExecute()
if (predict_taken)
++t_info.execContextStats.numPredictedBranches;
}
// increment the fetch instruction stat counters
if (curStaticInst) {
countFetchInst();
}
}
void
@@ -443,6 +474,9 @@ BaseSimpleCPU::postExecute()
->committedInstType[curStaticInst->opClass()]++;
commitStats[t_info.thread->threadId()]->updateComCtrlStats(curStaticInst);
/* increment the committed numInsts and numOps stats */
countCommitInst();
if (FullSystem)
traceFunctions(instAddr);

2
src/cpu/simple/base.hh
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@@ -182,6 +182,8 @@ class BaseSimpleCPU : public BaseCPU
}
void countInst();
void countFetchInst();
void countCommitInst();
Counter totalInsts() const override;
Counter totalOps() const override;

8
src/cpu/simple/exec_context.hh
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@@ -86,10 +86,6 @@ class SimpleExecContext : public ExecContext
: statistics::Group(cpu,
csprintf("exec_context.thread_%i",
thread->threadId()).c_str()),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed"),
ADD_STAT(numMatAluAccesses, statistics::units::Count::get(),
"Number of matrix alu accesses"),
ADD_STAT(numCallsReturns, statistics::units::Count::get(),
@@ -140,10 +136,6 @@ class SimpleExecContext : public ExecContext
.prereq(numBranchMispred);
}
// Number of simulated instructions
statistics::Scalar numInsts;
statistics::Scalar numOps;
// Number of matrix alu accesses
statistics::Scalar numMatAluAccesses;