decouple eviction from insertion in the cache.

src/mem/cache/cache_impl.hh

@@ -319,6 +319,7 @@ Cache<TagStore>::access(PacketPtr pkt, BlkType *&blk,
                 incMissCount(pkt);
                 return false;
             }
+            tags->insertBlock(pkt->getAddr(), blk);
             blk->status = BlkValid | BlkReadable;
         }
         std::memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
@@ -879,7 +880,7 @@ template<class TagStore>
 typename Cache<TagStore>::BlkType*
 Cache<TagStore>::allocateBlock(Addr addr, PacketList &writebacks)
 {
-    BlkType *blk = tags->findReplacement(addr, writebacks);
+    BlkType *blk = tags->findVictim(addr, writebacks);
 
     if (blk->isValid()) {
         Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
@@ -890,6 +891,7 @@ Cache<TagStore>::allocateBlock(Addr addr, PacketList &writebacks)
             assert(!blk->isWritable());
             assert(repl_mshr->needsExclusive());
             // too hard to replace block with transient state
+            // allocation failed, block not inserted
             return NULL;
         } else {
             DPRINTF(Cache, "replacement: replacing %x with %x: %s\n",
@@ -903,8 +905,6 @@ Cache<TagStore>::allocateBlock(Addr addr, PacketList &writebacks)
         }
     }
 
-    // Set tag for new block.  Caller is responsible for setting status.
-    blk->tag = tags->extractTag(addr);
     return blk;
 }
 
@@ -937,6 +937,8 @@ Cache<TagStore>::handleFill(PacketPtr pkt, BlkType *blk,
             tempBlock->set = tags->extractSet(addr);
             tempBlock->tag = tags->extractTag(addr);
             DPRINTF(Cache, "using temp block for %x\n", addr);
+        } else {
+            tags->insertBlock(addr, blk);
         }
     } else {
         // existing block... probably an upgrade

src/mem/cache/tags/fa_lru.cc

@@ -207,7 +207,7 @@ FALRU::findBlock(Addr addr) const
 }
 
 FALRUBlk*
-FALRU::findReplacement(Addr addr, PacketList &writebacks)
+FALRU::findVictim(Addr addr, PacketList &writebacks)
 {
     FALRUBlk * blk = tail;
     assert(blk->inCache == 0);
@@ -228,6 +228,11 @@ FALRU::findReplacement(Addr addr, PacketList &writebacks)
     return blk;
 }
 
+void
+FALRU::insertBlock(Addr addr, FALRU::BlkType *blk)
+{
+}
+
 void
 FALRU::moveToHead(FALRUBlk *blk)
 {

src/mem/cache/tags/fa_lru.hh

@@ -197,7 +197,9 @@ public:
      * @param writebacks List for any writebacks to be performed.
      * @return The block to place the replacement in.
      */
-    FALRUBlk* findReplacement(Addr addr, PacketList & writebacks);
+    FALRUBlk* findVictim(Addr addr, PacketList & writebacks);
+
+    void insertBlock(Addr addr, BlkType *blk);
 
     /**
      * Return the hit latency of this cache.

src/mem/cache/tags/iic.cc

@@ -297,7 +297,7 @@ IIC::findBlock(Addr addr) const
 
 
 IICTag*
-IIC::findReplacement(Addr addr, PacketList &writebacks)
+IIC::findVictim(Addr addr, PacketList &writebacks)
 {
     DPRINTF(IIC, "Finding Replacement for %x\n", addr);
     unsigned set = hash(addr);
@@ -339,6 +339,11 @@ IIC::findReplacement(Addr addr, PacketList &writebacks)
     return tag_ptr;
 }
 
+void
+IIC::insertBlock(Addr addr, BlkType* blk)
+{
+}
+
 void
 IIC::freeReplacementBlock(PacketList & writebacks)
 {

src/mem/cache/tags/iic.hh

@@ -435,7 +435,9 @@ class IIC : public BaseTags
      * @param writebacks List for any writebacks to be performed.
      * @return The block to place the replacement in.
      */
-    IICTag* findReplacement(Addr addr, PacketList &writebacks);
+    IICTag* findVictim(Addr addr, PacketList &writebacks);
+
+    void insertBlock(Addr addr, BlkType *blk);
 
     /**
      * Read the data from the internal storage of the given cache block.

src/mem/cache/tags/lru.cc

@@ -183,12 +183,11 @@ LRU::findBlock(Addr addr) const
 }
 
 LRUBlk*
-LRU::findReplacement(Addr addr, PacketList &writebacks)
+LRU::findVictim(Addr addr, PacketList &writebacks)
 {
     unsigned set = extractSet(addr);
     // grab a replacement candidate
     LRUBlk *blk = sets[set].blks[assoc-1];
-    sets[set].moveToHead(blk);
     if (blk->isValid()) {
         replacements[0]++;
         totalRefs += blk->refCount;
@@ -197,7 +196,14 @@ LRU::findReplacement(Addr addr, PacketList &writebacks)
 
         DPRINTF(CacheRepl, "set %x: selecting blk %x for replacement\n",
                 set, regenerateBlkAddr(blk->tag, set));
-    } else if (!blk->isTouched) {
+    }
+    return blk;
+}
+
+void
+LRU::insertBlock(Addr addr, LRU::BlkType *blk)
+{
+    if (!blk->isTouched) {
         tagsInUse++;
         blk->isTouched = true;
         if (!warmedUp && tagsInUse.value() >= warmupBound) {
@@ -206,7 +212,11 @@ LRU::findReplacement(Addr addr, PacketList &writebacks)
         }
     }
 
-    return blk;
+    // Set tag for new block.  Caller is responsible for setting status.
+    blk->tag = extractTag(addr);
+
+    unsigned set = extractSet(addr);
+    sets[set].moveToHead(blk);
 }
 
 void

src/mem/cache/tags/lru.hh

@@ -180,12 +180,20 @@ public:
     LRUBlk* findBlock(Addr addr) const;
 
     /**
-     * Find a replacement block for the address provided.
-     * @param pkt The request to a find a replacement candidate for.
+     * Find a block to evict for the address provided.
+     * @param addr The addr to a find a replacement candidate for.
      * @param writebacks List for any writebacks to be performed.
-     * @return The block to place the replacement in.
+     * @return The candidate block.
      */
-    LRUBlk* findReplacement(Addr addr, PacketList &writebacks);
+    LRUBlk* findVictim(Addr addr, PacketList &writebacks);
+
+    /**
+     * Insert the new block into the cache.  For LRU this means inserting into
+     * the MRU position of the set.
+     * @param addr The address to update.
+     * @param blk The block to update.
+     */
+     void insertBlock(Addr addr, BlkType *blk);
 
     /**
      * Generate the tag from the given address.