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arch-arm: Implement ID_AA64MMFR3_EL1 register

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Change-Id: If8c37bdccf35a070870900c06dc4640348f0f063
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
This commit is contained in:
Giacomo Travaglini
2023-05-23 16:49:04 +01:00
parent ec7921305b
commit c4c5d2e172
3 changed files with 26 additions and 1 deletions
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10
src/arch/arm/regs/misc.cc
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@@ -981,7 +981,7 @@ std::unordered_map<MiscRegNum64, MiscRegIndex> miscRegNumToIdx{
{ MiscRegNum64(3, 0, 0, 7, 0), MISCREG_ID_AA64MMFR0_EL1 },
{ MiscRegNum64(3, 0, 0, 7, 1), MISCREG_ID_AA64MMFR1_EL1 },
{ MiscRegNum64(3, 0, 0, 7, 2), MISCREG_ID_AA64MMFR2_EL1 },
{ MiscRegNum64(3, 0, 0, 7, 3), MISCREG_RAZ },
{ MiscRegNum64(3, 0, 0, 7, 3), MISCREG_ID_AA64MMFR3_EL1 },
{ MiscRegNum64(3, 0, 0, 7, 4), MISCREG_RAZ },
{ MiscRegNum64(3, 0, 0, 7, 5), MISCREG_RAZ },
{ MiscRegNum64(3, 0, 0, 7, 6), MISCREG_RAZ },
@@ -4366,6 +4366,14 @@ ISA::initializeMiscRegMetadata()
.faultRead(EL0, faultIdst)
.faultRead(EL1, faultHcrEL1<&HCR::tid3>)
.allPrivileges().writes(0);
InitReg(MISCREG_ID_AA64MMFR3_EL1)
.reset([p,release=release](){
AA64MMFR3 mmfr3_el1 = 0;
return mmfr3_el1;
}())
.faultRead(EL0, faultIdst)
.faultRead(EL1, faultHcrEL1<&HCR::tid3>)
.allPrivileges().writes(0);
InitReg(MISCREG_APDAKeyHi_EL1)
.faultRead(EL1, faultPauthEL1<true, &HFGTR::apdaKey>)

2
src/arch/arm/regs/misc.hh
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@@ -872,6 +872,7 @@ namespace ArmISA
MISCREG_TTBR1_EL2,
MISCREG_ID_AA64MMFR2_EL1,
MISCREG_ID_AA64MMFR3_EL1,
//PAuth Key Regsiters
MISCREG_APDAKeyHi_EL1,
@@ -2585,6 +2586,7 @@ namespace ArmISA
"ttbr1_el2",
"id_aa64mmfr2_el1",
"id_aa64mmfr3_el1",
"apdakeyhi_el1",
"apdakeylo_el1",

15
src/arch/arm/regs/misc_types.hh
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@@ -187,6 +187,21 @@ namespace ArmISA
Bitfield<3, 0> cnp;
EndBitUnion(AA64MMFR2)
BitUnion64(AA64MMFR3)
Bitfield<47, 44> anerr;
Bitfield<43, 40> snerr;
Bitfield<39, 36> d128_2;
Bitfield<35, 32> d128;
Bitfield<31, 28> mec;
Bitfield<27, 24> aie;
Bitfield<23, 20> s2poe;
Bitfield<19, 16> s1poe;
Bitfield<15, 12> s2pie;
Bitfield<11, 8> s1pie;
Bitfield<7, 4> sctlrx;
Bitfield<3, 0> tcrx;
EndBitUnion(AA64MMFR3)
BitUnion64(AA64PFR0)
Bitfield<63, 60> csv3;
Bitfield<59, 56> csv2;