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mem: Add invalid context id check on LLSC checks

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If the request's address is in the LLSC list, its context Id was being
fetched unconditionally, which could cause the assert at
Request::contextId() to fail.

Change-Id: Iae9791f81c8fe9a7fcd842cd8ab7db18f34f2808
Signed-off-by: Tiago Muck <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18792
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Tiago Muck
2018-12-12 15:52:41 -06:00
committed by Tiago Mück
parent c022369490
commit b8a4c87690
2 changed files with 8 additions and 3 deletions
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7
src/mem/abstract_mem.cc
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2010-2012,2017-2018 ARM Limited
* Copyright (c) 2010-2012,2017-2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -284,7 +284,10 @@ AbstractMemory::checkLockedAddrList(PacketPtr pkt)
DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
i->contextId, paddr);
ContextID owner_cid = i->contextId;
ContextID requester_cid = pkt->req->contextId();
assert(owner_cid != InvalidContextID);
ContextID requester_cid = req->hasContextId() ?
req->contextId() :
InvalidContextID;
if (owner_cid != requester_cid) {
ThreadContext* ctx = system()->getThreadContext(owner_cid);
TheISA::globalClearExclusive(ctx);

4
src/mem/abstract_mem.hh
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012 ARM Limited
* Copyright (c) 2012, 2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -83,6 +83,8 @@ class LockedAddr {
// check for matching execution context
bool matchesContext(const RequestPtr &req) const
{
assert(contextId != InvalidContextID);
assert(req->hasContextId());
return (contextId == req->contextId());
}