insn->inst

--HG--
extra : convert_revision : fcc556fb7e65855ec3c04ef272177c8e7a38fff9

cpu/base_cpu.cc

@@ -71,16 +71,16 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
         maxThreadsPerCPU = number_of_threads;
 
     // allocate per-thread instruction-based event queues
-    comInsnEventQueue = new (EventQueue *)[number_of_threads];
+    comInstEventQueue = new (EventQueue *)[number_of_threads];
     for (int i = 0; i < number_of_threads; ++i)
-        comInsnEventQueue[i] = new EventQueue("instruction-based event queue");
+        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
 
     //
     // set up instruction-count-based termination events, if any
     //
     if (max_insts_any_thread != 0)
         for (int i = 0; i < number_of_threads; ++i)
-            new SimExitEvent(comInsnEventQueue[i], max_insts_any_thread,
+            new SimExitEvent(comInstEventQueue[i], max_insts_any_thread,
                 "a thread reached the max instruction count");
 
     if (max_insts_all_threads != 0) {
@@ -90,7 +90,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
         int *counter = new int;
         *counter = number_of_threads;
         for (int i = 0; i < number_of_threads; ++i)
-            new CountedExitEvent(comInsnEventQueue[i],
+            new CountedExitEvent(comInstEventQueue[i],
                 "all threads reached the max instruction count",
                 max_insts_all_threads, *counter);
     }

cpu/base_cpu.hh

@@ -128,7 +128,7 @@ class BaseCPU : public SimObject
      * scheduling events based on number of instructions committed by
      * a particular thread.
      */
-    EventQueue **comInsnEventQueue;
+    EventQueue **comInstEventQueue;
 
     /**
      * Vector of per-thread load-based event queues.  Used for

cpu/exec_context.cc

@@ -51,7 +51,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
 #ifdef FS_MEASURE
       swCtx(NULL),
 #endif
-      func_exe_insn(0), storeCondFailures(0)
+      func_exe_inst(0), storeCondFailures(0)
 {
     memset(&regs, 0, sizeof(RegFile));
 }
@@ -61,14 +61,14 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
     : _status(ExecContext::Unallocated),
       cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
       process(_process), mem(process->getMemory()), asid(_asid),
-      func_exe_insn(0), storeCondFailures(0)
+      func_exe_inst(0), storeCondFailures(0)
 {
 }
 
 ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
                          FunctionalMemory *_mem, int _asid)
     : cpu(_cpu), thread_num(_thread_num), process(0), mem(_mem), asid(_asid),
-      func_exe_insn(0), storeCondFailures(0)
+      func_exe_inst(0), storeCondFailures(0)
 {
 }
 #endif
@@ -92,7 +92,7 @@ ExecContext::takeOverFrom(ExecContext *oldContext)
 #endif
     regs = oldContext->regs;
     cpu_id = oldContext->cpu_id;
-    func_exe_insn = oldContext->func_exe_insn;
+    func_exe_inst = oldContext->func_exe_inst;
 
     storeCondFailures = 0;
 
@@ -106,7 +106,7 @@ ExecContext::serialize(ostream &os)
     SERIALIZE_ENUM(_status);
     regs.serialize(os);
     // thread_num and cpu_id are deterministic from the config
-    SERIALIZE_SCALAR(func_exe_insn);
+    SERIALIZE_SCALAR(func_exe_inst);
 }
 
 
@@ -116,7 +116,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_ENUM(_status);
     regs.unserialize(cp, section);
     // thread_num and cpu_id are deterministic from the config
-    UNSERIALIZE_SCALAR(func_exe_insn);
+    UNSERIALIZE_SCALAR(func_exe_inst);
 }
 
 

cpu/exec_context.hh

@@ -158,7 +158,7 @@ class ExecContext
      * number of executed instructions, for matching with syscall trace
      * points in EIO files.
      */
-    Counter func_exe_insn;
+    Counter func_exe_inst;
 
     //
     // Count failed store conditionals so we can warn of apparent

cpu/simple_cpu/simple_cpu.cc

@@ -653,7 +653,7 @@ SimpleCPU::tick()
         numInst++;
 
         // check for instruction-count-based events
-        comInsnEventQueue[0]->serviceEvents(numInst);
+        comInstEventQueue[0]->serviceEvents(numInst);
 
         // decode the instruction
         StaticInstPtr<TheISA> si(inst);
@@ -666,7 +666,7 @@ SimpleCPU::tick()
         xc->regs.ra = (inst >> 21) & 0x1f;
 #endif // FULL_SYSTEM
 
-        xc->func_exe_insn++;
+        xc->func_exe_inst++;
 
         fault = si->execute(this, xc, traceData);
 #ifdef FS_MEASURE
@@ -770,10 +770,10 @@ END_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU)
 BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU)
 
     INIT_PARAM_DFLT(max_insts_any_thread,
-                    "terminate when any thread reaches this insn count",
+                    "terminate when any thread reaches this inst count",
                     0),
     INIT_PARAM_DFLT(max_insts_all_threads,
-                    "terminate when all threads have reached this insn count",
+                    "terminate when all threads have reached this inst count",
                     0),
     INIT_PARAM_DFLT(max_loads_any_thread,
                     "terminate when any thread reaches this load count",