stdlib: Move 'sim_quantum' set from Simulator to Processor
The setting of the `sim_quantum` parameter makes considerably more sense to occur in the Processor. Through the `_pre_instnatiate` functions this is now possible.
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@@ -406,11 +406,11 @@ class AbstractBoard:
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occurs whether a simulation is to be run in FS or
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SE mode will be determined by the board set."""
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# Connect the memory, processor, and cache hierarchy.
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# 1. Connect the memory, processor, and cache hierarchy.
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self._connect_things()
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# Return the Root object.
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return Root(
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# 2. Create the root object
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root = Root(
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full_system=(
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full_system
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if full_system is not None
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@@ -419,6 +419,13 @@ class AbstractBoard:
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board=self,
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)
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# 3. Call any of the components' `_pre_instantiate` functions.
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# Right now, only the processor requires this.
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self.get_processor()._pre_instantiate(root)
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# 4. Return the root object.
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return root
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def _connect_things_check(self):
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"""
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Here we check that connect things has been called and throw an
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@@ -33,7 +33,10 @@ from typing import (
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Optional,
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)
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from m5.objects import SubSystem
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from m5.objects import (
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Root,
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SubSystem,
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)
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from ...isas import ISA
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from ...utils.requires import requires
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@@ -83,3 +86,12 @@ class AbstractProcessor(SubSystem):
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def _post_instantiate(self) -> None:
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"""Called to set up anything needed after ``m5.instantiate``."""
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pass
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def _pre_instantiate(self, root: Root) -> None:
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"""Called in the `AbstractBoard`'s `_pre_instantiate` method. This is
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called after `connect_things`, after the creation of the root object
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(which is passed in as an argument), but before `m5.instantiate`).
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Subclasses should override this method to set up any connections.
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"""
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pass
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@@ -27,12 +27,14 @@
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from typing import List
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import m5
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from m5.objects import (
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BaseAtomicSimpleCPU,
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BaseMinorCPU,
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BaseNonCachingSimpleCPU,
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BaseO3CPU,
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BaseTimingSimpleCPU,
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Root,
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)
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from m5.util import warn
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@@ -99,3 +101,9 @@ class BaseCPUProcessor(AbstractProcessor):
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board.set_mem_mode(MemMode.ATOMIC)
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else:
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raise NotImplementedError
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def _pre_instantiate(self, root: Root) -> None:
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super()._pre_instantiate(root)
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if any(core.is_kvm_core() for core in self.get_cores()):
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m5.ticks.fixGlobalFrequency()
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root.sim_quantum = m5.ticks.fromSeconds(0.001)
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@@ -31,6 +31,7 @@ from typing import (
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)
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import m5
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from m5.objects import Root
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from ...utils.override import *
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from ..boards.abstract_board import AbstractBoard
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@@ -155,3 +156,24 @@ class SwitchableProcessor(AbstractProcessor):
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# Ensure the current processor is updated.
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self._current_cores = to_switch
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def _pre_instantiate(self, root: Root) -> None:
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super()._pre_instantiate(root)
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# The following is a bit of a hack. If a simulation is to use a KVM
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# core then the `sim_quantum` value must be set. However, in the
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# case of using a SwitchableProcessor the KVM cores may be
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# switched out and therefore not accessible via `get_cores()`.
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# This is the reason for the `isinstance` check.
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#
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# We cannot set the `sim_quantum` value in every simulation as
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# setting it causes the scheduling of exits to be off by the
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# `sim_quantum` value (something necessary if we are using KVM
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# cores). Ergo we only set the value of KVM cores are present.
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#
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# There is still a bug here in that if the user is switching to and
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# from KVM and non-KVM cores via the SwitchableProcessor then the
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# scheduling of exits for the non-KVM cores will be incorrect. This
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# will be fixed at a later date.
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if self._prepare_kvm:
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m5.ticks.fixGlobalFrequency()
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root.sim_quantum = m5.ticks.fromSeconds(0.001)
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@@ -670,29 +670,6 @@ class Simulator:
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full_system=self._full_system
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)
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# The following is a bit of a hack. If a simulation is to use a KVM
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# core then the `sim_quantum` value must be set. However, in the
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# case of using a SwitchableProcessor the KVM cores may be
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# switched out and therefore not accessible via `get_cores()`.
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# This is the reason for the `isinstance` check.
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#
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# We cannot set the `sim_quantum` value in every simulation as
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# setting it causes the scheduling of exits to be off by the
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# `sim_quantum` value (something necessary if we are using KVM
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# cores). Ergo we only set the value of KVM cores are present.
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#
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# There is still a bug here in that if the user is switching to and
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# from KVM and non-KVM cores via the SwitchableProcessor then the
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# scheduling of exits for the non-KVM cores will be incorrect. This
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# will be fixed at a later date.
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processor = self._board.processor
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if any(core.is_kvm_core() for core in processor.get_cores()) or (
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isinstance(processor, SwitchableProcessor)
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and any(core.is_kvm_core() for core in processor._all_cores())
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):
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m5.ticks.fixGlobalFrequency()
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root.sim_quantum = m5.ticks.fromSeconds(0.001)
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# m5.instantiate() takes a parameter specifying the path to the
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# checkpoint directory. If the parameter is None, no checkpoint
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# will be restored.
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