cpu: update info related direction into BP if mispredicted.

Update direction info of a branch into BP if, the branch is not
found in the target buffer. Therefore, this  updated direction is
used to squash the branch later on. Previously, some mispredicted
branches were not sqaushed as the BP had old info.

Reported-by: Dimitrios Chasapis

Change-Id: I4be2eb706edc5ffa9935948fb52a01667286c721
jira-issue: https://gem5.atlassian.net/browse/GEM5-355
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25903
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Dimitrios Chasapis <k4s4s.heavener@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
tv-reddy
2020-02-26 15:16:58 -08:00
committed by Trivikram Reddy
parent a1cee06e5a
commit ad65be829e

View File

@@ -263,6 +263,7 @@ BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
DPRINTF(Branch, "[tid:%i] [sn:%llu] BTB doesn't have a "
"valid entry\n",tid,seqNum);
pred_taken = false;
predict_record.predTaken = pred_taken;
// The Direction of the branch predictor is altered
// because the BTB did not have an entry
// The predictor needs to be updated accordingly
@@ -293,6 +294,7 @@ BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
} else {
++indirectMisses;
pred_taken = false;
predict_record.predTaken = pred_taken;
DPRINTF(Branch,
"[tid:%i] [sn:%llu] "
"Instruction %s no indirect "