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arch-arm: Don't change PSTATE in Illegal Exception return

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This patch fixes the Illegal Exception return handler. According to the
armarm documentation, when PSTATE.IL is set to one because of an illegal
exception return, PSTATE.{EL, nRW, SP} are unchanged. This means the
Exception level, Execution state, and stack pointer selection do not
change as a result of the return.

Change-Id: I35f2fe68fb2822a54fc4a21930871eab7a1aaab4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8021
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2017-12-19 10:18:13 +00:00
parent b885dc68a2
commit ad36e61ce4
2 changed files with 11 additions and 1 deletions
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10
src/arch/arm/insts/static_inst.cc
View File

@@ -1018,7 +1018,17 @@ ArmStaticInst::getPSTATEFromPSR(ThreadContext *tc, CPSR cpsr, CPSR spsr) const
new_cpsr.ss = 0;
if (illegalExceptionReturn(tc, cpsr, spsr)) {
// If the SPSR specifies an illegal exception return,
// then PSTATE.{M, nRW, EL, SP} are unchanged and PSTATE.IL
// is set to 1.
new_cpsr.il = 1;
if (cpsr.width) {
new_cpsr.mode = cpsr.mode;
} else {
new_cpsr.width = cpsr.width;
new_cpsr.el = cpsr.el;
new_cpsr.sp = cpsr.sp;
}
} else {
new_cpsr.il = spsr.il;
if (spsr.width && badMode32((OperatingMode)(uint8_t)spsr.mode)) {

2
src/arch/arm/isa.cc
View File

@@ -726,7 +726,7 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
CPSR old_cpsr = miscRegs[MISCREG_CPSR];
int old_mode = old_cpsr.mode;
CPSR cpsr = val;
if (old_mode != cpsr.mode) {
if (old_mode != cpsr.mode || cpsr.il != old_cpsr.il) {
getITBPtr(tc)->invalidateMiscReg();
getDTBPtr(tc)->invalidateMiscReg();
}