mem-cache: Add support for checking whether a cache is busy
This changeset adds support for checking whether the cache is currently busy and a timing request would be rejected. Change-Id: I5e37b011b2387b1fa1c9e687b9be545f06ffb5f5 Reviewed-on: https://gem5-review.googlesource.com/5042 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
31
src/mem/cache/cache.cc
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31
src/mem/cache/cache.cc
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@@ -2541,31 +2541,36 @@ Cache::CpuSidePort::getAddrRanges() const
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return cache->getAddrRanges();
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}
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bool
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Cache::CpuSidePort::tryTiming(PacketPtr pkt)
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{
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assert(!cache->system->bypassCaches());
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// always let express snoop packets through if even if blocked
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if (pkt->isExpressSnoop()) {
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return true;
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} else if (isBlocked() || mustSendRetry) {
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// either already committed to send a retry, or blocked
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mustSendRetry = true;
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return false;
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}
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mustSendRetry = false;
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return true;
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}
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bool
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Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
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{
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assert(!cache->system->bypassCaches());
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bool success = false;
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// always let express snoop packets through if even if blocked
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if (pkt->isExpressSnoop()) {
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// do not change the current retry state
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bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
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assert(bypass_success);
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return true;
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} else if (blocked || mustSendRetry) {
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// either already committed to send a retry, or blocked
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success = false;
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} else {
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// pass it on to the cache, and let the cache decide if we
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// have to retry or not
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success = cache->recvTimingReq(pkt);
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}
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// remember if we have to retry
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mustSendRetry = !success;
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return success;
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return tryTiming(pkt) && cache->recvTimingReq(pkt);
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}
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Tick
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2
src/mem/cache/cache.hh
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2
src/mem/cache/cache.hh
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@@ -90,6 +90,8 @@ class Cache : public BaseCache
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virtual bool recvTimingSnoopResp(PacketPtr pkt);
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virtual bool tryTiming(PacketPtr pkt);
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virtual bool recvTimingReq(PacketPtr pkt);
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virtual Tick recvAtomic(PacketPtr pkt);
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