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arch-arm: Fix line-length error in branch64.is

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Change-Id: I62c5d5fd47927a838e6731a464fc7e6d8afab768
This commit is contained in:
Bobby R. Bruce
2023-10-16 10:57:03 -07:00
parent 322b105b9d
commit aaefda3b08
1 changed files with 3 additions and 1 deletions
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4
src/arch/arm/isa/insts/branch64.isa
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@@ -208,7 +208,9 @@ let {{
ExceptionLevel curr_el = currEL(cpsr);
if (fgtEnabled(xc->tcBase()) && curr_el == EL1 &&
static_cast<HFGITR>(xc->tcBase()->readMiscReg(MISCREG_HFGITR_EL2)).eret) {
static_cast<HFGITR>(
xc->tcBase()->readMiscReg(MISCREG_HFGITR_EL2)).eret)
{
return std::make_shared<HypervisorTrap>(
machInst, %(trap_iss)d, ExceptionClass::TRAPPED_ERET);
}