dev-arm: Fix setupBootloader for VExpress_GEM5_V2

Recent changes in the setupBootloader method didn't take into account
that the VExpress_GEM5_Base class does require "loc" to be passed
to the bootloader setup method:

setupBootLoader(self, cur_sys, loc, boot_loader=None)

However VExpress_GEM5_V2_Base was just passing cur_sys and boot_loader
so that the bootloader was being passed as loc and boot_loader was
passed as None (default parameter):

super(VExpress_GEM5_V2_Base, self).setupBootLoader(
        cur_sys, boot_loader)

This patch is fixing this by removing loc from the VExpress_GEM5_Base
interface: the bootloader defaults (usinbg loc) are being set in the
derived classes (V1 and V2)

Change-Id: Ic4d4e4fd8d45a7af9207900287828119c3d7d56c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25583
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/dev/arm/RealView.py

@@ -1080,9 +1080,7 @@ Interrupts:
             self._attach_device(dev, bus, dma_ports)
             self.smmu.connect(dev, bus)
 
-    def setupBootLoader(self, cur_sys, loc, boot_loader=None):
-        if boot_loader is None:
-            boot_loader = [ loc('boot.arm64'), loc('boot.arm') ]
+    def setupBootLoader(self, cur_sys, boot_loader):
         super(VExpress_GEM5_Base, self).setupBootLoader(
                 cur_sys, boot_loader, 0x8000000, 0x80000000)
 
@@ -1114,6 +1112,12 @@ class VExpress_GEM5_V1_Base(VExpress_GEM5_Base):
         Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000),
     ]
 
+    def setupBootLoader(self, cur_sys, loc, boot_loader=None):
+        if boot_loader is None:
+            boot_loader = [ loc('boot.arm64'), loc('boot.arm') ]
+        super(VExpress_GEM5_V1_Base, self).setupBootLoader(
+                cur_sys, boot_loader)
+
     def _on_chip_devices(self):
         return super(VExpress_GEM5_V1_Base,self)._on_chip_devices() + [
                 self.gic, self.vgic, self.gicv2m,