Pseudoinst: Add an initParam pseudo inst function.

src/arch/alpha/isa/decoder.isa

@@ -985,7 +985,7 @@ decode OPCODE default Unknown::unknown() {
                 PseudoInst::loadsymbol(xc->tcBase());
             }}, No_OpClass, IsNonSpeculative);
             0x30: initparam({{
-                Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+                Ra = PseudoInst::initParam(xc->tcBase());
             }});
 #endif
             0x40: resetstats({{

src/arch/arm/isa/insts/m5ops.isa

@@ -203,7 +203,7 @@ let {{
 
     initparamCode = '''
 #if FULL_SYSTEM
-    Rt = xc->tcBase()->getCpuPtr()->system->init_param;
+    Rt = PseudoInst::initParam(xc->tcBase());
 #endif
     '''
 

src/arch/x86/isa/decoder/two_byte_opcodes.isa

@@ -161,8 +161,7 @@
                         }}, IsNonSpeculative);
 #if FULL_SYSTEM
                         0x30: m5initparam({{
-                            Rax = xc->tcBase()->getCpuPtr()->
-                                      system->init_param;
+                            Rax = PseudoInst::initParam(xc->tcBase());
                         }}, IsNonSpeculative);
                         0x31: m5loadsymbol({{
                             PseudoInst::loadsymbol(xc->tcBase());

src/sim/pseudo_inst.cc

@@ -260,6 +260,12 @@ addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
     debugSymbolTable->insert(addr,symbol);
 }
 
+uint64_t
+initParam(ThreadContext *tc)
+{
+    return tc->getCpuPtr()->system->init_param;
+}
+
 #endif
 
 

src/sim/pseudo_inst.hh

@@ -56,6 +56,7 @@ uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
     uint64_t offset);
 void loadsymbol(ThreadContext *xc);
 void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+uint64_t initParam(ThreadContext *xc);
 #endif
 
 uint64_t rpns(ThreadContext *tc);