mem: Move the Port base class into sim.

The Port class is going to be officially used for more than just memory
system connections.

Change-Id: I493e721f99051865c5f0c06946a2303ff723c2af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17036
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Gabe Black
2019-03-07 00:45:09 -08:00
parent 6e8be00dff
commit 993c26938c
5 changed files with 154 additions and 53 deletions

View File

@@ -54,6 +54,7 @@ Source('global_event.cc')
Source('init.cc', add_tags='python')
Source('init_signals.cc')
Source('main.cc', tags='main')
Source('port.cc')
Source('root.cc')
Source('serialize.cc')
Source('drain.cc')