fastmodel: Create a TLB model which uses IRIS to do translations.

Change-Id: I806dc8cdacce57e6ec31d2421b9e6b9733c7da02
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22119
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/arch/arm/fastmodel/iris/Iris.py

@@ -29,6 +29,12 @@ from m5.params import *
 from m5.proxy import *
 
 from m5.objects.BaseCPU import BaseCPU
+from m5.objects.BaseTLB import BaseTLB
+
+class IrisTLB(BaseTLB):
+    type = 'IrisTLB'
+    cxx_class = 'Iris::TLB'
+    cxx_header = 'arch/arm/fastmodel/iris/tlb.hh'
 
 class IrisBaseCPU(BaseCPU):
     type = 'IrisBaseCPU'
@@ -53,3 +59,6 @@ class IrisBaseCPU(BaseCPU):
             "Fast model exported virtual subsystem holding cores")
     thread_paths = VectorParam.String(
             "Sub-paths to elements in the EVS which support a thread context")
+
+    dtb = IrisTLB()
+    itb = IrisTLB()

src/arch/arm/fastmodel/iris/SConscript

@@ -32,5 +32,6 @@ if not env['USE_ARM_FASTMODEL']:
 
 SimObject('Iris.py')
 Source('cpu.cc')
+Source('tlb.cc')
 
 Source('thread_context.cc')

src/arch/arm/fastmodel/iris/tlb.cc

@@ -0,0 +1,75 @@
+/*
+ * Copyright 2019 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/arm/fastmodel/iris/tlb.hh"
+
+#include "arch/arm/fastmodel/iris/thread_context.hh"
+#include "arch/generic/debugfaults.hh"
+#include "params/IrisTLB.hh"
+#include "sim/faults.hh"
+
+Fault
+Iris::TLB::translateFunctional(
+        const RequestPtr &req, ::ThreadContext *tc, Mode mode)
+{
+    auto *itc = dynamic_cast<Iris::ThreadContext *>(tc);
+    panic_if(!itc, "Failed to cast to Iris::ThreadContext *");
+
+    Addr vaddr = req->getVaddr();
+    Addr paddr = 0;
+    bool success = itc->translateAddress(paddr, vaddr);
+    if (!success) {
+        return std::make_shared<GenericISA::M5PanicFault>(
+                "Failed translation");
+    } else {
+        req->setPaddr(paddr);
+        return NoFault;
+    }
+}
+
+Fault
+Iris::TLB::translateAtomic(
+        const RequestPtr &req, ::ThreadContext *tc, Mode mode)
+{
+    return translateFunctional(req, tc, mode);
+}
+
+void
+Iris::TLB::translateTiming(const RequestPtr &req, ::ThreadContext *tc,
+        Translation *translation, Mode mode)
+{
+    assert(translation);
+    translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
+}
+
+Iris::TLB *
+IrisTLBParams::create()
+{
+    return new Iris::TLB(this);
+}

src/arch/arm/fastmodel/iris/tlb.hh

@@ -0,0 +1,65 @@
+/*
+ * Copyright 2019 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_ARM_FASTMODEL_IRIS_TLB_HH__
+#define __ARCH_ARM_FASTMODEL_IRIS_TLB_HH__
+
+#include "arch/generic/tlb.hh"
+
+namespace Iris
+{
+
+class TLB : public BaseTLB
+{
+  public:
+    TLB(const Params *p) : BaseTLB(p) {}
+
+    void demapPage(Addr vaddr, uint64_t asn) override {}
+    void flushAll() override {}
+    void takeOverFrom(BaseTLB *otlb) override {}
+
+    Fault translateFunctional(
+        const RequestPtr &req, ::ThreadContext *tc, Mode mode) override;
+    Fault translateAtomic(
+        const RequestPtr &req, ::ThreadContext *tc, Mode mode) override;
+    void translateTiming(
+        const RequestPtr &req, ::ThreadContext *tc,
+        Translation *translation, Mode mode) override;
+
+    Fault
+    finalizePhysical(
+        const RequestPtr &req, ::ThreadContext *tc, Mode mode) const override
+    {
+        return NoFault;
+    }
+};
+
+} // namespace Iris
+
+#endif // __ARCH_ARM_FASTMODEL_IRIS_TLB_HH__