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dev-arm: Implement invalidateASID in SMMUv3 WalkCache

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This patch fixes a bug where issuing a invalidate-by-ASID command
(CMD_TLBI_NH_ASID) to the SMMU would cause Gem5 to crash.

Change-Id: I5b8343a17e43762fe3917560ae401a20be1e05b8
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20259
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Jan-Peter Larsson
2019-08-15 12:49:16 +01:00
committed by Giacomo Travaglini
parent e06d4f2658
commit 94f9eebd1f
1 changed files with 10 additions and 1 deletions
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11
src/dev/arm/smmu_v3_caches.cc
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@@ -1122,7 +1122,16 @@ WalkCache::invalidateVAA(Addr va, uint16_t vmid, const bool leaf_only)
void
WalkCache::invalidateASID(uint16_t asid, uint16_t vmid)
{
panic("%s unimplemented\n", __func__);
for (size_t s = 0; s < sets.size(); s++) {
Set &set = sets[s];
for (size_t i = 0; i < set.size(); i++) {
Entry &e = set[i];
if (e.asid==asid && e.vmid==vmid)
e.valid = false;
}
}
}
void