stats: update memtest-ruby
I don't know if the new stats are right or not, but we've been too long with a useless regression so I'm just going to update them.
This commit is contained in:
Steve Reinhardt
File diff suppressed because it is too large
Load Diff
@@ -1,76 +1,76 @@
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["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024"]
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print config: 1
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system.cpu4: completed 10000 read accesses @3654068
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system.cpu1: completed 10000 read accesses @3658672
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system.cpu6: completed 10000 read accesses @3667702
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system.cpu0: completed 10000 read accesses @3693712
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system.cpu2: completed 10000 read accesses @3695692
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system.cpu7: completed 10000 read accesses @3702934
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system.cpu3: completed 10000 read accesses @3713843
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system.cpu5: completed 10000 read accesses @3747976
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system.cpu4: completed 20000 read accesses @6783252
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system.cpu6: completed 20000 read accesses @6788574
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system.cpu1: completed 20000 read accesses @6811444
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system.cpu2: completed 20000 read accesses @6811575
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system.cpu7: completed 20000 read accesses @6823208
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system.cpu3: completed 20000 read accesses @6833412
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system.cpu0: completed 20000 read accesses @6842332
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system.cpu5: completed 20000 read accesses @6892128
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system.cpu4: completed 30000 read accesses @9900552
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system.cpu6: completed 30000 read accesses @9919466
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system.cpu7: completed 30000 read accesses @9934195
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system.cpu3: completed 30000 read accesses @9940524
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system.cpu2: completed 30000 read accesses @9940526
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system.cpu0: completed 30000 read accesses @9949032
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system.cpu1: completed 30000 read accesses @10008962
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system.cpu5: completed 30000 read accesses @10013847
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system.cpu0: completed 40000 read accesses @12997824
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system.cpu3: completed 40000 read accesses @13026659
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system.cpu4: completed 40000 read accesses @13029141
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system.cpu6: completed 40000 read accesses @13053052
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system.cpu7: completed 40000 read accesses @13057445
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system.cpu2: completed 40000 read accesses @13075320
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system.cpu5: completed 40000 read accesses @13152513
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system.cpu1: completed 40000 read accesses @13163064
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system.cpu3: completed 50000 read accesses @16170822
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system.cpu0: completed 50000 read accesses @16183660
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system.cpu4: completed 50000 read accesses @16197183
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system.cpu6: completed 50000 read accesses @16212971
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system.cpu7: completed 50000 read accesses @16214970
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system.cpu5: completed 50000 read accesses @16230286
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system.cpu2: completed 50000 read accesses @16247930
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system.cpu1: completed 50000 read accesses @16329114
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system.cpu3: completed 60000 read accesses @19270542
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system.cpu0: completed 60000 read accesses @19311899
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system.cpu6: completed 60000 read accesses @19330724
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system.cpu4: completed 60000 read accesses @19371866
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system.cpu5: completed 60000 read accesses @19382898
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system.cpu7: completed 60000 read accesses @19384231
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system.cpu2: completed 60000 read accesses @19408394
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system.cpu1: completed 60000 read accesses @19459020
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system.cpu3: completed 70000 read accesses @22372299
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system.cpu6: completed 70000 read accesses @22442853
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system.cpu4: completed 70000 read accesses @22471794
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system.cpu0: completed 70000 read accesses @22486932
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system.cpu7: completed 70000 read accesses @22490492
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system.cpu5: completed 70000 read accesses @22527204
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system.cpu2: completed 70000 read accesses @22582036
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system.cpu1: completed 70000 read accesses @22588150
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system.cpu3: completed 80000 read accesses @25508231
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system.cpu6: completed 80000 read accesses @25562794
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system.cpu5: completed 80000 read accesses @25572200
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system.cpu0: completed 80000 read accesses @25620392
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system.cpu7: completed 80000 read accesses @25639710
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system.cpu4: completed 80000 read accesses @25649778
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system.cpu1: completed 80000 read accesses @25686718
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system.cpu2: completed 80000 read accesses @25733199
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system.cpu3: completed 90000 read accesses @28604804
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system.cpu6: completed 90000 read accesses @28707428
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system.cpu5: completed 90000 read accesses @28713115
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system.cpu0: completed 90000 read accesses @28743912
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system.cpu4: completed 90000 read accesses @28780814
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system.cpu7: completed 90000 read accesses @28781814
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system.cpu1: completed 90000 read accesses @28787396
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system.cpu2: completed 90000 read accesses @28868162
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system.cpu3: completed 100000 read accesses @31749698
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system.cpu4: completed 10000 read accesses @3675185
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system.cpu2: completed 10000 read accesses @3684370
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system.cpu1: completed 10000 read accesses @3684384
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system.cpu5: completed 10000 read accesses @3692230
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system.cpu7: completed 10000 read accesses @3697989
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system.cpu3: completed 10000 read accesses @3700408
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system.cpu0: completed 10000 read accesses @3740018
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system.cpu6: completed 10000 read accesses @3740090
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system.cpu4: completed 20000 read accesses @6800644
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system.cpu5: completed 20000 read accesses @6817332
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system.cpu1: completed 20000 read accesses @6845862
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system.cpu7: completed 20000 read accesses @6846102
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system.cpu3: completed 20000 read accesses @6846189
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system.cpu6: completed 20000 read accesses @6869288
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system.cpu0: completed 20000 read accesses @6871457
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system.cpu2: completed 20000 read accesses @6873399
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system.cpu5: completed 30000 read accesses @9907427
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system.cpu1: completed 30000 read accesses @9942140
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system.cpu4: completed 30000 read accesses @9951770
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system.cpu3: completed 30000 read accesses @9955002
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system.cpu2: completed 30000 read accesses @9959638
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system.cpu7: completed 30000 read accesses @10014906
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system.cpu6: completed 30000 read accesses @10028154
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system.cpu0: completed 30000 read accesses @10058436
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system.cpu3: completed 40000 read accesses @13045316
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system.cpu5: completed 40000 read accesses @13050166
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system.cpu4: completed 40000 read accesses @13057566
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system.cpu6: completed 40000 read accesses @13079138
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system.cpu2: completed 40000 read accesses @13081014
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system.cpu1: completed 40000 read accesses @13142214
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system.cpu0: completed 40000 read accesses @13144987
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system.cpu7: completed 40000 read accesses @13150846
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system.cpu3: completed 50000 read accesses @16142041
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system.cpu5: completed 50000 read accesses @16172122
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system.cpu6: completed 50000 read accesses @16220230
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system.cpu2: completed 50000 read accesses @16227420
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system.cpu4: completed 50000 read accesses @16237330
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system.cpu0: completed 50000 read accesses @16246676
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system.cpu1: completed 50000 read accesses @16278708
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system.cpu7: completed 50000 read accesses @16279864
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system.cpu3: completed 60000 read accesses @19234712
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system.cpu0: completed 60000 read accesses @19348851
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system.cpu6: completed 60000 read accesses @19370476
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system.cpu4: completed 60000 read accesses @19371128
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system.cpu5: completed 60000 read accesses @19373426
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system.cpu2: completed 60000 read accesses @19377688
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system.cpu7: completed 60000 read accesses @19379274
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system.cpu1: completed 60000 read accesses @19415186
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system.cpu3: completed 70000 read accesses @22337696
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system.cpu0: completed 70000 read accesses @22429460
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system.cpu4: completed 70000 read accesses @22492782
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system.cpu6: completed 70000 read accesses @22501157
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system.cpu2: completed 70000 read accesses @22508620
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system.cpu7: completed 70000 read accesses @22510770
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system.cpu5: completed 70000 read accesses @22526762
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system.cpu1: completed 70000 read accesses @22535410
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system.cpu3: completed 80000 read accesses @25425072
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system.cpu0: completed 80000 read accesses @25533098
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system.cpu1: completed 80000 read accesses @25591166
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system.cpu7: completed 80000 read accesses @25605790
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system.cpu5: completed 80000 read accesses @25629716
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system.cpu6: completed 80000 read accesses @25648430
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system.cpu4: completed 80000 read accesses @25658464
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system.cpu2: completed 80000 read accesses @25694944
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system.cpu3: completed 90000 read accesses @28554280
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system.cpu1: completed 90000 read accesses @28698524
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system.cpu0: completed 90000 read accesses @28699664
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system.cpu7: completed 90000 read accesses @28703590
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system.cpu4: completed 90000 read accesses @28740026
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system.cpu5: completed 90000 read accesses @28744438
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system.cpu2: completed 90000 read accesses @28783998
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system.cpu6: completed 90000 read accesses @28784829
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system.cpu3: completed 100000 read accesses @31693010
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hack: be nice to actually delete the event here
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@@ -5,11 +5,11 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Aug 11 2009 13:41:17
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M5 revision be123e27612f+ 6494+ default tip
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M5 started Aug 11 2009 13:45:58
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M5 executing on svvint01
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M5 compiled Nov 3 2009 14:40:57
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M5 revision 0e5037cecaf7 6707 default tip
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M5 started Nov 3 2009 14:41:01
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M5 executing on phenom
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 31749698 because maximum number of loads reached
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Exiting @ tick 31693010 because maximum number of loads reached
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@@ -1,34 +1,34 @@
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---------- Begin Simulation Statistics ----------
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host_mem_usage 1507496 # Number of bytes of host memory used
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host_seconds 3280.71 # Real time elapsed on the host
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host_tick_rate 9678 # Simulator tick rate (ticks/s)
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host_mem_usage 1501368 # Number of bytes of host memory used
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host_seconds 892.41 # Real time elapsed on the host
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host_tick_rate 35514 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_seconds 0.000032 # Number of seconds simulated
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sim_ticks 31749698 # Number of ticks simulated
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sim_ticks 31693010 # Number of ticks simulated
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system.cpu0.num_copies 0 # number of copy accesses completed
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system.cpu0.num_reads 99565 # number of read accesses completed
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system.cpu0.num_writes 53743 # number of write accesses completed
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system.cpu0.num_reads 99568 # number of read accesses completed
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system.cpu0.num_writes 53636 # number of write accesses completed
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system.cpu1.num_copies 0 # number of copy accesses completed
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system.cpu1.num_reads 99657 # number of read accesses completed
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system.cpu1.num_writes 53715 # number of write accesses completed
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system.cpu1.num_reads 99545 # number of read accesses completed
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system.cpu1.num_writes 53439 # number of write accesses completed
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system.cpu2.num_copies 0 # number of copy accesses completed
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system.cpu2.num_reads 99204 # number of read accesses completed
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system.cpu2.num_writes 53874 # number of write accesses completed
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system.cpu2.num_reads 99287 # number of read accesses completed
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system.cpu2.num_writes 53468 # number of write accesses completed
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system.cpu3.num_copies 0 # number of copy accesses completed
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system.cpu3.num_reads 100000 # number of read accesses completed
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system.cpu3.num_writes 53515 # number of write accesses completed
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system.cpu3.num_writes 53560 # number of write accesses completed
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system.cpu4.num_copies 0 # number of copy accesses completed
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system.cpu4.num_reads 99473 # number of read accesses completed
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system.cpu4.num_writes 53442 # number of write accesses completed
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system.cpu4.num_reads 99582 # number of read accesses completed
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system.cpu4.num_writes 53929 # number of write accesses completed
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system.cpu5.num_copies 0 # number of copy accesses completed
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system.cpu5.num_reads 99627 # number of read accesses completed
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system.cpu5.num_writes 53511 # number of write accesses completed
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system.cpu5.num_reads 99543 # number of read accesses completed
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system.cpu5.num_writes 53703 # number of write accesses completed
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system.cpu6.num_copies 0 # number of copy accesses completed
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system.cpu6.num_reads 99662 # number of read accesses completed
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system.cpu6.num_writes 53565 # number of write accesses completed
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system.cpu6.num_reads 99253 # number of read accesses completed
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system.cpu6.num_writes 53497 # number of write accesses completed
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system.cpu7.num_copies 0 # number of copy accesses completed
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system.cpu7.num_reads 99533 # number of read accesses completed
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system.cpu7.num_writes 53739 # number of write accesses completed
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system.cpu7.num_reads 99640 # number of read accesses completed
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system.cpu7.num_writes 53676 # number of write accesses completed
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---------- End Simulation Statistics ----------
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