sparc: Move translation constants from isa_traits.hh into tlb.hh.
These aren't used outside of SPARC. Also get rid of some unused constants. Change-Id: Icfe119f88189348245a6f225a61e62dfa93ea951 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18470 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -44,23 +44,11 @@ namespace SparcISA
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// This makes sure the big endian versions of certain functions are used.
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using namespace BigEndianGuest;
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// real address virtual mapping
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// sort of like alpha super page, but less frequently used
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const Addr SegKPMEnd = ULL(0xfffffffc00000000);
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const Addr SegKPMBase = ULL(0xfffffac000000000);
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const Addr PageShift = 13;
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const Addr PageBytes = ULL(1) << PageShift;
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StaticInstPtr decodeInst(ExtMachInst);
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/////////// TLB Stuff ////////////
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const Addr StartVAddrHole = ULL(0x0000800000000000);
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const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
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const Addr VAddrAMask = ULL(0xFFFFFFFF);
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const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
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const Addr BytesInPageMask = ULL(0x1FFF);
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// Memory accesses cannot be unaligned
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const bool HasUnalignedMemAcc = false;
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@@ -44,6 +44,11 @@ class Packet;
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namespace SparcISA
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{
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const Addr StartVAddrHole = ULL(0x0000800000000000);
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const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
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const Addr VAddrAMask = ULL(0xFFFFFFFF);
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const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
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class TLB : public BaseTLB
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{
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// These faults need to be able to populate the tlb in SE mode.
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