fastmodel: Use all possible address spaces when setting up a bp.

gem5 does not historically distinguish between address spaces when
interacting with gdb, and gdb doesn't really give it any address space
information to work with. To ensure we catch whatever address space
we might be in by the time we get to the interesting address, we'll set
a breakpoint in all possible address spaces simultaneously with the
expectation that we'll hit one of them.

Change-Id: I9f4b93d04914db7a3c42be6236a523d35194afda
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25268
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>

src/arch/arm/fastmodel/CortexA76/thread_context.cc

@@ -180,20 +180,23 @@ CortexA76TC::setCCRegFlat(RegIndex idx, RegVal val)
     Iris::ThreadContext::setCCRegFlat(idx, val);
 }
 
-iris::MemorySpaceId
-CortexA76TC::getBpSpaceId(Addr pc) const
+const std::vector<iris::MemorySpaceId> &
+CortexA76TC::getBpSpaceIds() const
 {
-    if (bpSpaceId == iris::IRIS_UINT64_MAX) {
+    if (bpSpaceIds.empty()) {
         for (auto &space: memorySpaces) {
-            if (space.canonicalMsn == Iris::CurrentMsn) {
-                bpSpaceId = space.spaceId;
-                break;
+            auto cmsn = space.canonicalMsn;
+            if (cmsn == Iris::SecureMonitorMsn ||
+                    cmsn == Iris::GuestMsn ||
+                    cmsn == Iris::NsHypMsn ||
+                    cmsn == Iris::HypAppMsn) {
+                bpSpaceIds.push_back(space.spaceId);
             }
         }
-        panic_if(bpSpaceId == iris::IRIS_UINT64_MAX,
-                "Unable to find address space for breakpoints.");
+        panic_if(bpSpaceIds.empty(),
+                "Unable to find address space(s) for breakpoints.");
     }
-    return bpSpaceId;
+    return bpSpaceIds;
 }
 
 Iris::ThreadContext::IdxNameMap CortexA76TC::miscRegIdxNameMap({
@@ -943,6 +946,6 @@ Iris::ThreadContext::IdxNameMap CortexA76TC::vecRegIdxNameMap({
         { 28, "V28" }, { 29, "V29" }, { 30, "V30" }, { 31, "V31" }
 });
 
-iris::MemorySpaceId CortexA76TC::bpSpaceId = iris::IRIS_UINT64_MAX;
+std::vector<iris::MemorySpaceId> CortexA76TC::bpSpaceIds;
 
 } // namespace FastModel

src/arch/arm/fastmodel/CortexA76/thread_context.hh

@@ -44,7 +44,7 @@ class CortexA76TC : public Iris::ThreadContext
     static IdxNameMap flattenedIntIdxNameMap;
     static IdxNameMap ccRegIdxNameMap;
     static IdxNameMap vecRegIdxNameMap;
-    static iris::MemorySpaceId bpSpaceId;
+    static std::vector<iris::MemorySpaceId> bpSpaceIds;
 
   public:
     CortexA76TC(::BaseCPU *cpu, int id, System *system,
@@ -62,7 +62,7 @@ class CortexA76TC : public Iris::ThreadContext
     RegVal readCCRegFlat(RegIndex idx) const override;
     void setCCRegFlat(RegIndex idx, RegVal val) override;
 
-    iris::MemorySpaceId getBpSpaceId(Addr pc) const override;
+    const std::vector<iris::MemorySpaceId> &getBpSpaceIds() const override;
 };
 
 } // namespace FastModel

src/arch/arm/fastmodel/iris/thread_context.cc

@@ -132,18 +132,21 @@ ThreadContext::getOrAllocBp(Addr pc)
 void
 ThreadContext::installBp(BpInfoIt it)
 {
-    BpId id;
     Addr pc = it->second->pc;
-    auto space_id = getBpSpaceId(pc);
-    call().breakpoint_set_code(_instId, id, pc, space_id, 0, true);
-    it->second->id = id;
+    const auto &space_ids = getBpSpaceIds();
+    for (auto sid: space_ids) {
+        BpId id;
+        call().breakpoint_set_code(_instId, id, pc, sid, 0, true);
+        it->second->ids.push_back(id);
+    }
 }
 
 void
 ThreadContext::uninstallBp(BpInfoIt it)
 {
-    call().breakpoint_delete(_instId, it->second->id);
-    it->second->clearId();
+    for (auto id: it->second->ids)
+        call().breakpoint_delete(_instId, id);
+    it->second->clearIds();
 }
 
 void
@@ -152,7 +155,7 @@ ThreadContext::delBp(BpInfoIt it)
     panic_if(!it->second->empty(),
              "BP info still had events associated with it.");
 
-    if (it->second->validId())
+    if (it->second->validIds())
         uninstallBp(it);
 
     bps.erase(it);
@@ -322,7 +325,7 @@ ThreadContext::schedule(PCEvent *e)
     auto it = getOrAllocBp(e->pc());
     it->second->events->push_back(e);
 
-    if (_instId != iris::IRIS_UINT64_MAX && !it->second->validId())
+    if (_instId != iris::IRIS_UINT64_MAX && !it->second->validIds())
         installBp(it);
 
     return true;

src/arch/arm/fastmodel/iris/thread_context.hh

@@ -109,17 +109,15 @@ class ThreadContext : public ::ThreadContext
     struct BpInfo
     {
         Addr pc;
-        BpId id;
+        std::vector<BpId> ids;
         using EventList = std::list<PCEvent *>;
         std::shared_ptr<EventList> events;
 
-        BpInfo(Addr _pc) : pc(_pc), id(iris::IRIS_UINT64_MAX),
-                           events(new EventList)
-        {}
+        BpInfo(Addr _pc) : pc(_pc), events(new EventList) {}
 
         bool empty() const { return events->empty(); }
-        bool validId() const { return id != iris::IRIS_UINT64_MAX; }
-        void clearId() { id = iris::IRIS_UINT64_MAX; }
+        bool validIds() const { return !ids.empty(); }
+        void clearIds() { ids.clear(); }
     };
 
     using BpInfoPtr = std::unique_ptr<BpInfo>;
@@ -134,7 +132,7 @@ class ThreadContext : public ::ThreadContext
     void uninstallBp(BpInfoIt it);
     void delBp(BpInfoIt it);
 
-    virtual iris::MemorySpaceId getBpSpaceId(Addr pc) const = 0;
+    virtual const std::vector<iris::MemorySpaceId> &getBpSpaceIds() const = 0;
 
 
     iris::IrisErrorCode instanceRegistryChanged(