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arch-arm: Fix ArmKVM build

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BaseInterrupts don't have a checkRaw method.
This was breaking gem5 compilation on a Arm machine

Change-Id: I8717b1bcf64ed14e8a0f63a9dcaca6041dbea4d3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25431
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-02-17 14:27:46 +00:00
parent c73048df0d
commit 8fb933841f
2 changed files with 8 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/arch/arm/kvm/arm_cpu.cc
View File

@@ -45,6 +45,7 @@
#include <cerrno>
#include <memory>
#include "arch/arm/interrupts.hh"
#include "arch/registers.hh"
#include "cpu/kvm/base.hh"
#include "debug/Kvm.hh"
@@ -270,8 +271,9 @@ ArmKvmCPU::startup()
Tick
ArmKvmCPU::kvmRun(Tick ticks)
{
bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
const bool simFIQ(interrupt->checkRaw(INT_FIQ));
const bool simIRQ(interrupt->checkRaw(INT_IRQ));
if (fiqAsserted != simFIQ) {
fiqAsserted = simFIQ;

6
src/arch/arm/kvm/base_cpu.cc
View File

@@ -41,6 +41,7 @@
#include <linux/kvm.h>
#include "arch/arm/interrupts.hh"
#include "debug/KvmInt.hh"
#include "params/BaseArmKvmCPU.hh"
@@ -88,8 +89,9 @@ BaseArmKvmCPU::startup()
Tick
BaseArmKvmCPU::kvmRun(Tick ticks)
{
const bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
const bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
const bool simFIQ(interrupt->checkRaw(INT_FIQ));
const bool simIRQ(interrupt->checkRaw(INT_IRQ));
if (!vm.hasKernelIRQChip()) {
if (fiqAsserted != simFIQ) {