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arch-mips, arch-power: removed unused stats

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Change-Id: Ic44943eaefab027d6dc665e531f827202b353093
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32834
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Emily Brickey
2020-08-18 11:28:59 -07:00
parent 9b8cc2f5c3
commit 8f0fa8ed78
4 changed files with 0 additions and 142 deletions
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57
src/arch/mips/tlb.cc
View File

@@ -217,63 +217,6 @@ TLB::unserialize(CheckpointIn &cp)
}
}
void
TLB::regStats()
{
BaseTLB::regStats();
read_hits
.name(name() + ".read_hits")
.desc("DTB read hits")
;
read_misses
.name(name() + ".read_misses")
.desc("DTB read misses")
;
read_accesses
.name(name() + ".read_accesses")
.desc("DTB read accesses")
;
write_hits
.name(name() + ".write_hits")
.desc("DTB write hits")
;
write_misses
.name(name() + ".write_misses")
.desc("DTB write misses")
;
write_accesses
.name(name() + ".write_accesses")
.desc("DTB write accesses")
;
hits
.name(name() + ".hits")
.desc("DTB hits")
;
misses
.name(name() + ".misses")
.desc("DTB misses")
;
accesses
.name(name() + ".accesses")
.desc("DTB accesses")
;
hits = read_hits + write_hits;
misses = read_misses + write_misses;
accesses = read_accesses + write_accesses;
}
Fault
TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode)
{

14
src/arch/mips/tlb.hh
View File

@@ -61,18 +61,6 @@ class TLB : public BaseTLB
void nextnlu() { if (++nlu >= size) nlu = 0; }
MipsISA::PTE *lookup(Addr vpn, uint8_t asn) const;
mutable Stats::Scalar read_hits;
mutable Stats::Scalar read_misses;
mutable Stats::Scalar read_acv;
mutable Stats::Scalar read_accesses;
mutable Stats::Scalar write_hits;
mutable Stats::Scalar write_misses;
mutable Stats::Scalar write_acv;
mutable Stats::Scalar write_accesses;
Stats::Formula hits;
Stats::Formula misses;
Stats::Formula accesses;
public:
typedef MipsTLBParams Params;
TLB(const Params *p);
@@ -104,8 +92,6 @@ class TLB : public BaseTLB
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
void regStats() override;
Fault translateAtomic(
const RequestPtr &req, ThreadContext *tc, Mode mode) override;
void translateTiming(

57
src/arch/power/tlb.cc
View File

@@ -215,63 +215,6 @@ TLB::unserialize(CheckpointIn &cp)
}
}
void
TLB::regStats()
{
BaseTLB::regStats();
read_hits
.name(name() + ".read_hits")
.desc("DTB read hits")
;
read_misses
.name(name() + ".read_misses")
.desc("DTB read misses")
;
read_accesses
.name(name() + ".read_accesses")
.desc("DTB read accesses")
;
write_hits
.name(name() + ".write_hits")
.desc("DTB write hits")
;
write_misses
.name(name() + ".write_misses")
.desc("DTB write misses")
;
write_accesses
.name(name() + ".write_accesses")
.desc("DTB write accesses")
;
hits
.name(name() + ".hits")
.desc("DTB hits")
;
misses
.name(name() + ".misses")
.desc("DTB misses")
;
accesses
.name(name() + ".accesses")
.desc("DTB accesses")
;
hits = read_hits + write_hits;
misses = read_misses + write_misses;
accesses = read_accesses + write_accesses;
}
Fault
TLB::translateInst(const RequestPtr &req, ThreadContext *tc)
{

14
src/arch/power/tlb.hh
View File

@@ -110,18 +110,6 @@ class TLB : public BaseTLB
PowerISA::PTE *lookup(Addr vpn, uint8_t asn) const;
mutable Stats::Scalar read_hits;
mutable Stats::Scalar read_misses;
mutable Stats::Scalar read_acv;
mutable Stats::Scalar read_accesses;
mutable Stats::Scalar write_hits;
mutable Stats::Scalar write_misses;
mutable Stats::Scalar write_acv;
mutable Stats::Scalar write_accesses;
Stats::Formula hits;
Stats::Formula misses;
Stats::Formula accesses;
public:
typedef PowerTLBParams Params;
TLB(const Params *p);
@@ -170,8 +158,6 @@ class TLB : public BaseTLB
// Checkpointing
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
void regStats() override;
};
} // namespace PowerISA