dev-arm: Add GITS_PIDR2 register to the ITS memory map

The GITS Peripheral Identification Register #2 bits assignments are the
same as those for GICD_PIDR2.

Change-Id: I235008a383e08dd557d899cb3aa18202ef943f8b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20254
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2019-08-14 17:50:06 +01:00
parent 705fe5ef44
commit 8ec72b4fba
3 changed files with 6 additions and 0 deletions

View File

@@ -53,6 +53,7 @@ class Gicv3Distributor : public Serializable
friend class Gicv3Redistributor;
friend class Gicv3CPUInterface;
friend class Gicv3Its;
protected:

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@@ -834,6 +834,10 @@ Gicv3Its::read(PacketPtr pkt)
value = gitsCreadr;
break;
case GITS_PIDR2:
value = gic->getDistributor()->gicdPidr2;
break;
case GITS_TRANSLATER:
value = gitsTranslater;
break;

View File

@@ -123,6 +123,7 @@ class Gicv3Its : public BasicPioDevice
GITS_CBASER = itsControl + 0x0080,
GITS_CWRITER = itsControl + 0x0088,
GITS_CREADR = itsControl + 0x0090,
GITS_PIDR2 = itsControl + 0xffe8,
// Translation frame
GITS_TRANSLATER = itsTranslate + 0x0040