automerge
This commit is contained in:
@@ -159,8 +159,10 @@ def x86IOAddress(port):
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IO_address_space_base = 0x8000000000000000
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return IO_address_space_base + port;
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def makeLinuxX86System(mem_mode, mdesc = None):
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self = LinuxX86System()
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def makeX86System(mem_mode, mdesc = None, self = None):
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if self == None:
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self = X86System()
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if not mdesc:
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# generic system
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mdesc = SysConfig()
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@@ -171,6 +173,29 @@ def makeLinuxX86System(mem_mode, mdesc = None):
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self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
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self.physmem.port = self.membus.port
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# North Bridge
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self.iobus = Bus(bus_id=0)
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self.bridge = Bridge(delay='50ns', nack_delay='4ns')
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self.bridge.side_a = self.iobus.port
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self.bridge.side_b = self.membus.port
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# Platform
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self.pc = PC()
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self.pc.attachIO(self.iobus)
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self.intrctrl = IntrControl()
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# Add in a Bios information structure.
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structures = [X86SMBiosBiosInformation()]
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self.smbios_table.structures = structures
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def makeLinuxX86System(mem_mode, mdesc = None):
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self = LinuxX86System()
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# Build up a generic x86 system and then specialize it for Linux
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makeX86System(mem_mode, mdesc, self)
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# We assume below that there's at least 1MB of memory. We'll require 2
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# just to avoid corner cases.
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assert(self.physmem.range.second >= 0x200000)
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@@ -187,21 +212,9 @@ def makeLinuxX86System(mem_mode, mdesc = None):
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size = '%dB' % (self.physmem.range.second - 0x100000 - 1),
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range_type = 1))
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# North Bridge
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self.iobus = Bus(bus_id=0)
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self.bridge = Bridge(delay='50ns', nack_delay='4ns')
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self.bridge.side_a = self.iobus.port
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self.bridge.side_b = self.membus.port
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# Command line
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self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=9608015'
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# Platform
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self.pc = PC()
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self.pc.attachIO(self.iobus)
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self.intrctrl = IntrControl()
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return self
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@@ -110,13 +110,10 @@ if env['TARGET_ISA'] == 'x86':
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if env['FULL_SYSTEM']:
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SimObject('X86System.py')
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SimObject('bios/E820.py')
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# Full-system sources
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Source('bios/e820.cc')
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Source('linux/system.cc')
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Source('pagetable_walker.cc')
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Source('smbios.cc')
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Source('system.cc')
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Source('stacktrace.cc')
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Source('vtophys.cc')
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@@ -55,10 +55,13 @@
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from m5.params import *
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from E820 import X86E820Table, X86E820Entry
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from SMBios import X86SMBiosSMBiosTable
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from System import System
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class X86System(System):
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type = 'X86System'
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smbios_table = Param.X86SMBiosSMBiosTable(
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X86SMBiosSMBiosTable(), 'table of smbios/dmi information')
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class LinuxX86System(X86System):
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type = 'LinuxX86System'
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69
src/arch/x86/bios/SConscript
Normal file
69
src/arch/x86/bios/SConscript
Normal file
@@ -0,0 +1,69 @@
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# -*- mode:python -*-
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# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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# All rights reserved.
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#
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# Redistribution and use of this software in source and binary forms,
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# with or without modification, are permitted provided that the
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# following conditions are met:
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#
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# The software must be used only for Non-Commercial Use which means any
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# use which is NOT directed to receiving any direct monetary
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# compensation for, or commercial advantage from such use. Illustrative
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# examples of non-commercial use are academic research, personal study,
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# teaching, education and corporate research & development.
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# Illustrative examples of commercial use are distributing products for
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# commercial advantage and providing services using the software for
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# commercial advantage.
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#
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# If you wish to use this software or functionality therein that may be
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# covered by patents for commercial use, please contact:
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# Director of Intellectual Property Licensing
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# Office of Strategy and Technology
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# Hewlett-Packard Company
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# 1501 Page Mill Road
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# Palo Alto, California 94304
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#
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# Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer. Redistributions
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# in binary form must reproduce the above copyright notice, this list of
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||||
# conditions and the following disclaimer in the documentation and/or
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# other materials provided with the distribution. Neither the name of
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||||
# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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||||
# contributors may be used to endorse or promote products derived from
|
||||
# this software without specific prior written permission. No right of
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||||
# sublicense is granted herewith. Derivatives of the software and
|
||||
# output created using the software may be prepared, but only for
|
||||
# Non-Commercial Uses. Derivatives of the software may be shared with
|
||||
# others provided: (i) the others agree to abide by the list of
|
||||
# conditions herein which includes the Non-Commercial Use restrictions;
|
||||
# and (ii) such Derivatives of the software include the above copyright
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||||
# notice to acknowledge the contribution from this software where
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||||
# applicable, this list of conditions and the disclaimer below.
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||||
#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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Import('*')
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if env['TARGET_ISA'] == 'x86':
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if env['FULL_SYSTEM']:
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# The table generated by the bootloader using the BIOS and passed to
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# the operating system which maps out physical memory.
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SimObject('E820.py')
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Source('e820.cc')
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# The DMI tables.
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SimObject('SMBios.py')
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Source('smbios.cc')
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140
src/arch/x86/bios/SMBios.py
Normal file
140
src/arch/x86/bios/SMBios.py
Normal file
@@ -0,0 +1,140 @@
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# Copyright (c) 2008 The Hewlett-Packard Development Company
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# All rights reserved.
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#
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# Redistribution and use of this software in source and binary forms,
|
||||
# with or without modification, are permitted provided that the
|
||||
# following conditions are met:
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||||
#
|
||||
# The software must be used only for Non-Commercial Use which means any
|
||||
# use which is NOT directed to receiving any direct monetary
|
||||
# compensation for, or commercial advantage from such use. Illustrative
|
||||
# examples of non-commercial use are academic research, personal study,
|
||||
# teaching, education and corporate research & development.
|
||||
# Illustrative examples of commercial use are distributing products for
|
||||
# commercial advantage and providing services using the software for
|
||||
# commercial advantage.
|
||||
#
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||||
# If you wish to use this software or functionality therein that may be
|
||||
# covered by patents for commercial use, please contact:
|
||||
# Director of Intellectual Property Licensing
|
||||
# Office of Strategy and Technology
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||||
# Hewlett-Packard Company
|
||||
# 1501 Page Mill Road
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||||
# Palo Alto, California 94304
|
||||
#
|
||||
# Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer. Redistributions
|
||||
# in binary form must reproduce the above copyright notice, this list of
|
||||
# conditions and the following disclaimer in the documentation and/or
|
||||
# other materials provided with the distribution. Neither the name of
|
||||
# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from
|
||||
# this software without specific prior written permission. No right of
|
||||
# sublicense is granted herewith. Derivatives of the software and
|
||||
# output created using the software may be prepared, but only for
|
||||
# Non-Commercial Uses. Derivatives of the software may be shared with
|
||||
# others provided: (i) the others agree to abide by the list of
|
||||
# conditions herein which includes the Non-Commercial Use restrictions;
|
||||
# and (ii) such Derivatives of the software include the above copyright
|
||||
# notice to acknowledge the contribution from this software where
|
||||
# applicable, this list of conditions and the disclaimer below.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||||
#
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# Authors: Gabe Black
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from m5.params import *
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from m5.SimObject import SimObject
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class X86SMBiosSMBiosStructure(SimObject):
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type = 'X86SMBiosSMBiosStructure'
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cxx_class = 'X86ISA::SMBios::SMBiosStructure'
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abstract = True
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class Characteristic(Enum):
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map = {'Unknown' : 2,
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'Unsupported' : 3,
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'ISA' : 4,
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'MCA' : 5,
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'EISA' : 6,
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'PCI' : 7,
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'PCMCIA' : 8,
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'PnP' : 9,
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'APM' : 10,
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'Flash' : 11,
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'Shadow' : 12,
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'VL_Vesa' : 13,
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'ESCD' : 14,
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'CDBoot' : 15,
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'SelectBoot' : 16,
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'Socketed' : 17,
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'PCMCIABoot' : 18,
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'EDD' : 19,
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'NEC9800' : 20,
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'Toshiba' : 21,
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'Floppy_5_25_360KB' : 22,
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'Floppy_5_25_1_2MB' : 23,
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'Floppy_3_5_720KB' : 24,
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'Floppy_3_5_2_88MB' : 25,
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'PrintScreen' : 26,
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'Keyboard8024' : 27,
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'Serial' : 28,
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'Printer' : 29,
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'CGA_Mono' : 30,
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'NEC_PC_98' : 31
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}
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class ExtCharacteristic(Enum):
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map = {'ACPI' : 0,
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'USBLegacy' : 1,
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'AGP' : 2,
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'I20Boot' : 3,
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'LS_120Boot' : 4,
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'ZIPBoot' : 5,
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'FirewireBoot' : 6,
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'SmartBattery' : 7,
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'BootSpec' : 8,
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'NetServiceBoot' : 9,
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'TargetContent' : 10
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}
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class X86SMBiosBiosInformation(X86SMBiosSMBiosStructure):
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type = 'X86SMBiosBiosInformation'
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cxx_class = 'X86ISA::SMBios::BiosInformation'
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vendor = Param.String("", "vendor name string")
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version = Param.String("", "version string")
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starting_addr_segment = \
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Param.UInt16(0, "segment location of bios starting address")
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release_date = Param.String("06/08/2008", "release date")
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rom_size = Param.UInt8(0, "rom size")
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characteristics = VectorParam.Characteristic([],
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"bios characteristic bit vector")
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characteristic_ext_bytes = VectorParam.ExtCharacteristic([],
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"extended bios characteristic bit vector")
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major = Param.UInt8(0, "major version number")
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minor = Param.UInt8(0, "minor version number")
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emb_cont_firmware_major = Param.UInt8(0,
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"embedded controller firmware major version number")
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emb_cont_firmware_minor = Param.UInt8(0,
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"embedded controller firmware minor version number")
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class X86SMBiosSMBiosTable(SimObject):
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type = 'X86SMBiosSMBiosTable'
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cxx_class = 'X86ISA::SMBios::SMBiosTable'
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major_version = Param.UInt8(2, "major version number")
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minor_version = Param.UInt8(5, "minor version number")
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structures = VectorParam.X86SMBiosSMBiosStructure([], "smbios structures")
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@@ -85,12 +85,17 @@
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* Authors: Gabe Black
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*/
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#include "arch/x86/smbios.hh"
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#include "arch/x86/bios/smbios.hh"
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#include "arch/x86/isa_traits.hh"
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#include "mem/port.hh"
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#include "params/X86SMBiosBiosInformation.hh"
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#include "params/X86SMBiosSMBiosStructure.hh"
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#include "params/X86SMBiosSMBiosTable.hh"
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#include "sim/byteswap.hh"
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#include "sim/host.hh"
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using namespace std;
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const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
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const uint8_t X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::formattedArea[] = {0,0,0,0,0};
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@@ -101,6 +106,116 @@ const uint8_t X86ISA::SMBios::SMBiosTable::
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const char X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::IntermediateHeader::anchorString[] = "_DMI_";
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template <class T>
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uint64_t
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composeBitVector(T vec)
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{
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uint64_t val = 0;
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typename T::iterator vecIt;
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for (vecIt = vec.begin(); vecIt != vec.end(); vecIt++) {
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val |= (1 << (*vecIt));
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}
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return val;
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}
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uint16_t
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X86ISA::SMBios::SMBiosStructure::writeOut(FunctionalPort * port, Addr addr)
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{
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port->writeBlob(addr, (uint8_t *)(&type), 1);
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uint8_t length = getLength();
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port->writeBlob(addr + 1, (uint8_t *)(&length), 1);
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uint16_t handleGuest = X86ISA::htog(handle);
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port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
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return length + getStringLength();
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}
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X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) :
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SimObject(p), type(_type), handle(0), stringFields(false)
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{}
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void
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X86ISA::SMBios::SMBiosStructure::writeOutStrings(
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FunctionalPort * port, Addr addr)
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{
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std::vector<std::string>::iterator it;
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Addr offset = 0;
|
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|
||||
const uint8_t nullTerminator = 0;
|
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|
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// If there are string fields but none of them are used, that's a
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// special case which is handled by this if.
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if (strings.size() == 0 && stringFields) {
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port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
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offset++;
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} else {
|
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for (it = strings.begin(); it != strings.end(); it++) {
|
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port->writeBlob(addr + offset,
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(uint8_t *)it->c_str(), it->length() + 1);
|
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offset += it->length() + 1;
|
||||
}
|
||||
}
|
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port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
|
||||
}
|
||||
|
||||
int
|
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X86ISA::SMBios::SMBiosStructure::getStringLength()
|
||||
{
|
||||
int size = 0;
|
||||
std::vector<std::string>::iterator it;
|
||||
|
||||
for (it = strings.begin(); it != strings.end(); it++) {
|
||||
size += it->length() + 1;
|
||||
}
|
||||
|
||||
return size + 1;
|
||||
}
|
||||
|
||||
int
|
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X86ISA::SMBios::SMBiosStructure::addString(string & newString)
|
||||
{
|
||||
stringFields = true;
|
||||
// If a string is empty, treat it as not existing. The index for empty
|
||||
// strings is 0.
|
||||
if (newString.length() == 0)
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return 0;
|
||||
strings.push_back(newString);
|
||||
return strings.size();
|
||||
}
|
||||
|
||||
string
|
||||
X86ISA::SMBios::SMBiosStructure::readString(int n)
|
||||
{
|
||||
assert(n > 0 && n <= strings.size());
|
||||
return strings[n - 1];
|
||||
}
|
||||
|
||||
void
|
||||
X86ISA::SMBios::SMBiosStructure::setString(int n, std::string & newString)
|
||||
{
|
||||
assert(n > 0 && n <= strings.size());
|
||||
strings[n - 1] = newString;
|
||||
}
|
||||
|
||||
X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) :
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SMBiosStructure(p, Type),
|
||||
startingAddrSegment(p->starting_addr_segment),
|
||||
romSize(p->rom_size),
|
||||
majorVer(p->major), minorVer(p->minor),
|
||||
embContFirmwareMajor(p->emb_cont_firmware_major),
|
||||
embContFirmwareMinor(p->emb_cont_firmware_minor)
|
||||
{
|
||||
vendor = addString(p->vendor);
|
||||
version = addString(p->version);
|
||||
releaseDate = addString(p->release_date);
|
||||
|
||||
characteristics = composeBitVector(p->characteristics);
|
||||
characteristicExtBytes =
|
||||
composeBitVector(p->characteristic_ext_bytes);
|
||||
}
|
||||
|
||||
uint16_t
|
||||
X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
|
||||
{
|
||||
@@ -122,8 +237,8 @@ X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
|
||||
X86ISA::htog(characteristicExtBytes);
|
||||
port->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
|
||||
|
||||
port->writeBlob(addr + 0x14, (uint8_t *)(&major), 1);
|
||||
port->writeBlob(addr + 0x15, (uint8_t *)(&minor), 1);
|
||||
port->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
|
||||
port->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
|
||||
port->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
|
||||
port->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
|
||||
|
||||
@@ -132,9 +247,22 @@ X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
|
||||
return size;
|
||||
}
|
||||
|
||||
void
|
||||
X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr)
|
||||
X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) :
|
||||
SimObject(p), structures(p->structures)
|
||||
{
|
||||
smbiosHeader.majorVersion = p->major_version;
|
||||
smbiosHeader.minorVersion = p->minor_version;
|
||||
assert(p->major_version <= 9);
|
||||
assert(p->minor_version <= 9);
|
||||
smbiosHeader.intermediateHeader.smbiosBCDRevision =
|
||||
(p->major_version << 4) | p->minor_version;
|
||||
}
|
||||
|
||||
void
|
||||
X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
|
||||
Addr &headerSize, Addr &structSize)
|
||||
{
|
||||
headerSize = 0x1F;
|
||||
|
||||
/*
|
||||
* The main header
|
||||
@@ -205,14 +333,16 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr)
|
||||
Addr base = smbiosHeader.intermediateHeader.tableAddr;
|
||||
Addr offset = 0;
|
||||
uint16_t maxSize = 0;
|
||||
std::vector<SMBiosStructure>::iterator it;
|
||||
std::vector<SMBiosStructure *>::iterator it;
|
||||
for (it = structures.begin(); it != structures.end(); it++) {
|
||||
uint16_t size = it->writeOut(port, base + offset);
|
||||
uint16_t size = (*it)->writeOut(port, base + offset);
|
||||
if (size > maxSize)
|
||||
maxSize = size;
|
||||
offset += size;
|
||||
}
|
||||
|
||||
structSize = offset;
|
||||
|
||||
/*
|
||||
* Header
|
||||
*/
|
||||
@@ -243,3 +373,15 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr)
|
||||
intChecksum = -intChecksum;
|
||||
port->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
|
||||
}
|
||||
|
||||
X86ISA::SMBios::BiosInformation *
|
||||
X86SMBiosBiosInformationParams::create()
|
||||
{
|
||||
return new X86ISA::SMBios::BiosInformation(this);
|
||||
}
|
||||
|
||||
X86ISA::SMBios::SMBiosTable *
|
||||
X86SMBiosSMBiosTableParams::create()
|
||||
{
|
||||
return new X86ISA::SMBios::SMBiosTable(this);
|
||||
}
|
||||
@@ -85,16 +85,21 @@
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_X86_SMBIOS_HH__
|
||||
#define __ARCH_X86_SMBIOS_HH__
|
||||
#ifndef __ARCH_X86_BIOS_SMBIOS_HH__
|
||||
#define __ARCH_X86_BIOS_SMBIOS_HH__
|
||||
|
||||
#include <string>
|
||||
#include <vector>
|
||||
|
||||
#include "arch/x86/isa_traits.hh"
|
||||
#include "mem/port.hh"
|
||||
#include "sim/byteswap.hh"
|
||||
#include "enums/Characteristic.hh"
|
||||
#include "enums/ExtCharacteristic.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
|
||||
class FunctionalPort;
|
||||
class X86SMBiosBiosInformationParams;
|
||||
class X86SMBiosSMBiosStructureParams;
|
||||
class X86SMBiosSMBiosTableParams;
|
||||
|
||||
namespace X86ISA
|
||||
{
|
||||
@@ -102,8 +107,11 @@ namespace X86ISA
|
||||
namespace SMBios
|
||||
{
|
||||
|
||||
class SMBiosStructure
|
||||
class SMBiosStructure : public SimObject
|
||||
{
|
||||
protected:
|
||||
typedef X86SMBiosSMBiosStructureParams Params;
|
||||
|
||||
public:
|
||||
|
||||
virtual
|
||||
@@ -126,73 +134,33 @@ class SMBiosStructure
|
||||
return 4;
|
||||
}
|
||||
|
||||
virtual uint16_t
|
||||
writeOut(FunctionalPort * port, Addr addr)
|
||||
{
|
||||
port->writeBlob(addr, (uint8_t *)(&type), 1);
|
||||
|
||||
uint8_t length = getLength();
|
||||
port->writeBlob(addr + 1, (uint8_t *)(&length), 1);
|
||||
|
||||
uint16_t handleGuest = X86ISA::htog(handle);
|
||||
port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
|
||||
|
||||
return length + getStringLength();
|
||||
}
|
||||
virtual uint16_t writeOut(FunctionalPort * port, Addr addr);
|
||||
|
||||
protected:
|
||||
bool stringFields;
|
||||
|
||||
SMBiosStructure(Params * p, uint8_t _type);
|
||||
|
||||
std::vector<std::string> strings;
|
||||
|
||||
void writeOutStrings(FunctionalPort * port, Addr addr)
|
||||
{
|
||||
std::vector<std::string>::iterator it;
|
||||
Addr offset = 0;
|
||||
void writeOutStrings(FunctionalPort * port, Addr addr);
|
||||
|
||||
for (it = strings.begin(); it != strings.end(); it++) {
|
||||
port->writeBlob(addr + offset,
|
||||
(uint8_t *)it->c_str(), it->length() + 1);
|
||||
offset += it->length() + 1;
|
||||
}
|
||||
|
||||
const uint8_t nullTerminator = 0;
|
||||
port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
|
||||
}
|
||||
|
||||
int getStringLength()
|
||||
{
|
||||
int size = 0;
|
||||
std::vector<std::string>::iterator it;
|
||||
|
||||
for (it = strings.begin(); it != strings.end(); it++) {
|
||||
size += it->length() + 1;
|
||||
}
|
||||
|
||||
return size + 1;
|
||||
}
|
||||
int getStringLength();
|
||||
|
||||
public:
|
||||
|
||||
int addString(std::string & newString)
|
||||
{
|
||||
strings.push_back(newString);
|
||||
return strings.size();
|
||||
}
|
||||
|
||||
std::string readString(int n)
|
||||
{
|
||||
assert(n > 0 && n <= strings.size());
|
||||
return strings[n - 1];
|
||||
}
|
||||
|
||||
void setString(int n, std::string & newString)
|
||||
{
|
||||
assert(n > 0 && n <= strings.size());
|
||||
strings[n - 1] = newString;
|
||||
}
|
||||
int addString(std::string & newString);
|
||||
std::string readString(int n);
|
||||
void setString(int n, std::string & newString);
|
||||
};
|
||||
|
||||
class BiosInformation : public SMBiosStructure
|
||||
{
|
||||
protected:
|
||||
const static uint8_t Type = 0;
|
||||
|
||||
typedef X86SMBiosBiosInformationParams Params;
|
||||
|
||||
public:
|
||||
// Offset 04h, 1 byte
|
||||
uint8_t vendor;
|
||||
@@ -211,21 +179,25 @@ class BiosInformation : public SMBiosStructure
|
||||
// Offset 12h, 2 bytes
|
||||
uint16_t characteristicExtBytes;
|
||||
// Offset 14h, 1 byte
|
||||
uint8_t major;
|
||||
uint8_t majorVer;
|
||||
// Offset 15h, 1 byte
|
||||
uint8_t minor;
|
||||
uint8_t minorVer;
|
||||
// Offset 16h, 1 byte
|
||||
uint8_t embContFirmwareMajor;
|
||||
// Offset 17h, 1 byte
|
||||
uint8_t embContFirmwareMinor;
|
||||
|
||||
BiosInformation(Params * p);
|
||||
|
||||
uint8_t getLength() { return 0x18; }
|
||||
uint16_t writeOut(FunctionalPort * port, Addr addr);
|
||||
};
|
||||
|
||||
class SMBiosTable
|
||||
class SMBiosTable : public SimObject
|
||||
{
|
||||
public:
|
||||
protected:
|
||||
typedef X86SMBiosSMBiosTableParams Params;
|
||||
|
||||
struct SMBiosHeader
|
||||
{
|
||||
SMBiosHeader()
|
||||
@@ -281,9 +253,23 @@ class SMBiosTable
|
||||
} intermediateHeader;
|
||||
} smbiosHeader;
|
||||
|
||||
void writeOut(FunctionalPort * port, Addr addr);
|
||||
std::vector<SMBiosStructure *> structures;
|
||||
|
||||
std::vector<SMBiosStructure> structures;
|
||||
public:
|
||||
SMBiosTable(Params * p);
|
||||
|
||||
Addr getTableAddr()
|
||||
{
|
||||
return smbiosHeader.intermediateHeader.tableAddr;
|
||||
}
|
||||
|
||||
void setTableAddr(Addr addr)
|
||||
{
|
||||
smbiosHeader.intermediateHeader.tableAddr = addr;
|
||||
}
|
||||
|
||||
void writeOut(FunctionalPort * port, Addr addr,
|
||||
Addr &headerSize, Addr &structSize);
|
||||
};
|
||||
|
||||
} //SMBios
|
||||
@@ -55,9 +55,9 @@
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#include "arch/x86/bios/smbios.hh"
|
||||
#include "arch/x86/miscregs.hh"
|
||||
#include "arch/x86/system.hh"
|
||||
#include "arch/x86/smbios.hh"
|
||||
#include "arch/vtophys.hh"
|
||||
#include "base/remote_gdb.hh"
|
||||
#include "base/loader/object_file.hh"
|
||||
@@ -73,13 +73,8 @@ using namespace LittleEndianGuest;
|
||||
using namespace X86ISA;
|
||||
|
||||
X86System::X86System(Params *p)
|
||||
: System(p)
|
||||
{
|
||||
smbiosTable = new X86ISA::SMBios::SMBiosTable;
|
||||
smbiosTable->smbiosHeader.majorVersion = 2;
|
||||
smbiosTable->smbiosHeader.minorVersion = 5;
|
||||
smbiosTable->smbiosHeader.intermediateHeader.smbiosBCDRevision = 0x25;
|
||||
}
|
||||
: System(p), smbiosTable(p->smbios_table)
|
||||
{}
|
||||
|
||||
void
|
||||
X86System::startup()
|
||||
@@ -236,27 +231,33 @@ X86System::startup()
|
||||
|
||||
// We should now be in long mode. Yay!
|
||||
|
||||
Addr ebdaPos = 0xF0000;
|
||||
|
||||
Addr headerSize, structSize;
|
||||
//Write out the SMBios/DMI table
|
||||
writeOutSMBiosTable(0xF0000);
|
||||
writeOutSMBiosTable(ebdaPos, headerSize, structSize);
|
||||
ebdaPos += (headerSize + structSize);
|
||||
}
|
||||
|
||||
void
|
||||
X86System::writeOutSMBiosTable(Addr header, Addr table)
|
||||
X86System::writeOutSMBiosTable(Addr header,
|
||||
Addr &headerSize, Addr &structSize, Addr table)
|
||||
{
|
||||
// Get a port to write the table and header to memory.
|
||||
FunctionalPort * physPort = threadContexts[0]->getPhysPort();
|
||||
|
||||
// If the table location isn't specified, just put it after the header.
|
||||
// The header size as of the 2.5 SMBios specification is 0x1F bytes
|
||||
if (!table) {
|
||||
if (!smbiosTable->smbiosHeader.intermediateHeader.tableAddr)
|
||||
smbiosTable->smbiosHeader.
|
||||
intermediateHeader.tableAddr = header + 0x1F;
|
||||
} else {
|
||||
smbiosTable->smbiosHeader.intermediateHeader.tableAddr = table;
|
||||
}
|
||||
if (!table)
|
||||
table = header + 0x1F;
|
||||
smbiosTable->setTableAddr(table);
|
||||
|
||||
smbiosTable->writeOut(physPort, header);
|
||||
smbiosTable->writeOut(physPort, header, headerSize, structSize);
|
||||
|
||||
// Do some bounds checking to make sure we at least didn't step on
|
||||
// ourselves.
|
||||
assert(header > table || header + headerSize <= table);
|
||||
assert(table > header || table + structSize <= header);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -96,7 +96,8 @@ class X86System : public System
|
||||
|
||||
X86ISA::SMBios::SMBiosTable * smbiosTable;
|
||||
|
||||
void writeOutSMBiosTable(Addr header, Addr table = 0);
|
||||
void writeOutSMBiosTable(Addr header,
|
||||
Addr &headerSize, Addr &tableSize, Addr table = 0);
|
||||
|
||||
const Params *params() const { return (const Params *)_params; }
|
||||
|
||||
|
||||
@@ -56,8 +56,9 @@ class Cmos : public SubDevice
|
||||
class X86RTC : public MC146818
|
||||
{
|
||||
public:
|
||||
X86RTC(const std::string &n, const struct tm time,
|
||||
bool bcd, Tick frequency) : MC146818(n, time, bcd, frequency)
|
||||
X86RTC(EventManager *em, const std::string &n, const struct tm time,
|
||||
bool bcd, Tick frequency) :
|
||||
MC146818(em, n, time, bcd, frequency)
|
||||
{
|
||||
}
|
||||
protected:
|
||||
@@ -69,22 +70,22 @@ class Cmos : public SubDevice
|
||||
|
||||
public:
|
||||
|
||||
Cmos() : rtc("rtc", foo_time, true, ULL(5000000000))
|
||||
Cmos(EventManager *em) : rtc(em, "rtc", foo_time, true, ULL(5000000000))
|
||||
{
|
||||
memset(regs, 0, numRegs * sizeof(uint8_t));
|
||||
address = 0;
|
||||
}
|
||||
|
||||
Cmos(Tick _latency) : SubDevice(_latency),
|
||||
rtc("rtc", foo_time, true, ULL(5000000000))
|
||||
Cmos(EventManager *em, Tick _latency) : SubDevice(_latency),
|
||||
rtc(em, "rtc", foo_time, true, ULL(5000000000))
|
||||
{
|
||||
memset(regs, 0, numRegs * sizeof(uint8_t));
|
||||
address = 0;
|
||||
}
|
||||
|
||||
Cmos(Addr start, Addr size, Tick _latency) :
|
||||
Cmos(EventManager *em, Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency),
|
||||
rtc("rtc", foo_time, true, ULL(5000000000))
|
||||
rtc(em, "rtc", foo_time, true, ULL(5000000000))
|
||||
{
|
||||
memset(regs, 0, numRegs * sizeof(uint8_t));
|
||||
address = 0;
|
||||
|
||||
@@ -46,13 +46,14 @@ class I8254 : public SubDevice
|
||||
public:
|
||||
Intel8254Timer pit;
|
||||
|
||||
I8254(const std::string &name) : pit(name)
|
||||
I8254(EventManager *em, const std::string &name) : pit(em, name)
|
||||
{}
|
||||
I8254(const std::string &name, Tick _latency) :
|
||||
SubDevice(_latency), pit(name)
|
||||
I8254(EventManager *em, const std::string &name, Tick _latency) :
|
||||
SubDevice(_latency), pit(em, name)
|
||||
{}
|
||||
I8254(const std::string &name, Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency), pit(name)
|
||||
I8254(EventManager *em, const std::string &name,
|
||||
Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency), pit(em, name)
|
||||
{}
|
||||
|
||||
Tick read(PacketPtr pkt);
|
||||
|
||||
@@ -69,8 +69,8 @@ SouthBridge::write(PacketPtr pkt)
|
||||
SouthBridge::SouthBridge(const Params *p) : PioDevice(p),
|
||||
pic1(0x20, 2, p->pio_latency),
|
||||
pic2(0xA0, 2, p->pio_latency),
|
||||
pit(p->name + ".pit", 0x40, 4, p->pio_latency),
|
||||
cmos(0x70, 2, p->pio_latency),
|
||||
pit(this, p->name + ".pit", 0x40, 4, p->pio_latency),
|
||||
cmos(this, 0x70, 2, p->pio_latency),
|
||||
speaker(&pit, 0x61, 1, p->pio_latency)
|
||||
{
|
||||
addDevice(pic1);
|
||||
|
||||
Reference in New Issue
Block a user