dev-arm: Add flash0 memory to VExpress_GEM5 platform
This memory is present in the VE RS1 memory map Change-Id: Ia00c802f137d8a82c93b984f4043ba9f7fd8027a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Adrian Herrera <adrian.herrera@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25983 Tested-by: kokoro <noreply+kokoro@google.com>
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committed by
Giacomo Travaglini
parent
b53315bf30
commit
873ca61730
@@ -879,7 +879,7 @@ References:
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Memory map:
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0x00000000-0x03ffffff: Boot memory (CS0)
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0x04000000-0x07ffffff: Reserved
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0x08000000-0x0bffffff: Reserved (CS0 alias)
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0x08000000-0x0bffffff: NOR FLASH0 (CS0 alias)
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0x0c000000-0x0fffffff: Reserved (Off-chip, CS4)
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0x10000000-0x13ffffff: gem5-specific peripherals (Off-chip, CS5)
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0x10000000-0x1000ffff: gem5 energy controller
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@@ -970,6 +970,10 @@ Interrupts:
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bootmem = SimpleMemory(range=AddrRange(0, size='64MB'),
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conf_table_reported=False)
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# NOR flash, flash0
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flash0 = SimpleMemory(range=AddrRange(0x08000000, size='64MB'),
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conf_table_reported=False)
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# Platform control device (off-chip)
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realview_io = RealViewCtrl(proc_id0=0x14000000, proc_id1=0x14000000,
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idreg=0x02250000, pio_addr=0x1c010000)
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@@ -993,6 +997,7 @@ Interrupts:
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def _on_chip_memory(self):
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memories = [
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self.bootmem,
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self.flash0,
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]
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return memories
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