mem-ruby: MESI_Three_Level fix L1 in_port ranks

The L1 cache contains three in_port networks with ranks 0-2-3.
This is a benign typo, however, this patch corrects the ranks to
0-1-2 for clarity.

Change-Id: Id9bb63dae310af0f962345a114b0ccb8bddcf696
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24257
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
This commit is contained in:
Timothy Hayes
2019-10-18 16:43:00 +01:00
committed by Giacomo Travaglini
parent cd69bb5041
commit 8430889fa7

View File

@@ -277,7 +277,7 @@ machine(MachineType:L1Cache, "MESI Directory L1 Cache CMP")
out_port(bufferToL0_out, CoherenceMsg, bufferToL0);
// Response From the L2 Cache to this L1 cache
in_port(responseNetwork_in, ResponseMsg, responseFromL2, rank = 3) {
in_port(responseNetwork_in, ResponseMsg, responseFromL2, rank = 2) {
if (responseNetwork_in.isReady(clockEdge())) {
peek(responseNetwork_in, ResponseMsg) {
assert(in_msg.Destination.isElement(machineID));
@@ -315,7 +315,7 @@ machine(MachineType:L1Cache, "MESI Directory L1 Cache CMP")
}
// Request to this L1 cache from the shared L2
in_port(requestNetwork_in, RequestMsg, requestFromL2, rank = 2) {
in_port(requestNetwork_in, RequestMsg, requestFromL2, rank = 1) {
if(requestNetwork_in.isReady(clockEdge())) {
peek(requestNetwork_in, RequestMsg) {
assert(in_msg.Destination.isElement(machineID));