arch-arm: Rename SelfDebug member variables
* enableFlag -> mde The "enableFlag" variable, enabling the Breakpoint, Watchpoint, Vector Catch exceptions is actually the cached version of MDSCR_EL1.MDE. The "enableFlag" name looks too general as it's not covering the Software Step exception case. * bKDE -> kde * bSDD -> sdd The b prefix was likely referring to "breakpoint". However these bitfields are actually used by watchpoints as well. Change-Id: I48b762b32b2d763f4c4ceb7dcc28968cfb470fc1 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32775 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com>
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@@ -72,7 +72,7 @@ SelfDebug::testDebug(ThreadContext *tc, const RequestPtr &req,
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Fault
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SelfDebug::testBreakPoints(ThreadContext *tc, Addr vaddr)
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{
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if (!enableFlag)
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if (!mde)
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return NoFault;
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setAArch32(tc);
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@@ -127,7 +127,7 @@ SelfDebug::testWatchPoints(ThreadContext *tc, Addr vaddr, bool write,
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to32 = targetAArch32(tc);
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if (!initialized)
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init(tc);
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if (!isDebugEnabled(tc) || !enableFlag)
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if (!isDebugEnabled(tc) || !mde)
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return NoFault;
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ExceptionLevel el = (ExceptionLevel) currEL(tc);
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@@ -168,12 +168,12 @@ SelfDebug::isDebugEnabledForEL64(ThreadContext *tc, ExceptionLevel el,
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(!secure || HaveSecureEL2Ext(tc)) && enableTdeTge;
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ExceptionLevel target_el = route_to_el2 ? EL2 : EL1;
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if (oslk || (bSDD && secure && ArmSystem::haveEL(tc, EL3))) {
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if (oslk || (sdd && secure && ArmSystem::haveEL(tc, EL3))) {
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return false;
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}
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if (el == target_el) {
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return bKDE && !mask;
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return kde && !mask;
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} else {
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return target_el > el;
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}
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@@ -720,7 +720,7 @@ SelfDebug::testVectorCatch(ThreadContext *tc, Addr addr,
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to32 = targetAArch32(tc);
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if (!initialized)
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init(tc);
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if (!isDebugEnabled(tc) || !enableFlag || !aarch32)
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if (!isDebugEnabled(tc) || !mde || !aarch32)
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return NoFault;
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ExceptionLevel el = (ExceptionLevel) currEL(tc);
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@@ -167,8 +167,7 @@ class WatchPoint
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inline Addr
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getAddrfromReg(ThreadContext *tc)
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{
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return bits(tc->readMiscReg(valRegIndex), maxAddrSize, 0);
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return bits(tc->readMiscReg(valRegIndex), maxAddrSize, 0);
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}
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inline bool
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@@ -282,11 +281,9 @@ class SelfDebug
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bool initialized;
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bool enableTdeTge; // MDCR_EL2.TDE || HCR_EL2.TGE
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// THIS is MDSCR_EL1.MDE in aarch64 and DBGDSCRext.MDBGen in aarch32
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bool enableFlag;
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bool bSDD; // MDCR_EL3.SDD
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bool bKDE; // MDSCR_EL1.KDE
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bool mde; // MDSCR_EL1.MDE, DBGDSCRext.MDBGen
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bool sdd; // MDCR_EL3.SDD
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bool kde; // MDSCR_EL1.KDE
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bool oslk; // OS lock flag
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bool aarch32; // updates with stage1 aarch64/32
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@@ -295,7 +292,7 @@ class SelfDebug
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public:
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SelfDebug()
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: initialized(false), enableTdeTge(false),
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enableFlag(false), bSDD(false), bKDE(false), oslk(false)
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mde(false), sdd(false), kde(false), oslk(false)
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{
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softStep = new SoftwareStep(this);
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}
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@@ -320,6 +317,8 @@ class SelfDebug
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public:
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Fault testVectorCatch(ThreadContext *tc, Addr addr, ArmFault* flt);
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bool enabled() const { return mde || softStep->bSS; };
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inline BrkPoint*
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getBrkPoint(uint8_t index)
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{
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@@ -373,21 +372,21 @@ class SelfDebug
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inline void
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setbSDD(RegVal val)
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{
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bSDD = bits(val, 16);
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sdd = bits(val, 16);
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}
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inline void
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setMDSCRvals(RegVal val)
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{
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enableFlag = bits(val, 15);
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bKDE = bits(val, 13);
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mde = bits(val, 15);
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kde = bits(val, 13);
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softStep->bSS = bits(val, 0);
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}
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inline void
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setMDBGen(RegVal val)
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{
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enableFlag = bits(val, 15);
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mde = bits(val, 15);
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}
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inline void
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