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ARM: Get rid of a few more unused operands.

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This commit is contained in:
Gabe Black
2009-06-21 09:48:51 -07:00
parent 4415e2dcd6
commit 7e4f132369
2 changed files with 0 additions and 4 deletions
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1
src/arch/arm/isa/decoder.isa
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@@ -832,7 +832,6 @@ decode COND_CODE default Unknown::unknown() {
// ARM System Call (SoftWare Interrupt)
1: swi({{ if (testPredicate(Cpsr, condCode))
{
//xc->syscall(R7);
xc->syscall(IMMED_23_0);
}
}});

3
src/arch/arm/isa/operands.isa
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@@ -48,12 +48,9 @@ def operands {{
'Rn': ('IntReg', 'uw', 'RN', 'IsInteger', 4),
'Raddr': ('IntReg', 'uw', '17', 'IsInteger', 5),
'R0': ('IntReg', 'uw', '0', 'IsInteger', 5),
'R7': ('IntReg', 'uw', '7', 'IsInteger', 5),
'Rhi': ('IntReg', 'uw', '18', 'IsInteger', 5),
'Rlo': ('IntReg', 'uw', '19', 'IsInteger', 6),
'LR': ('IntReg', 'uw', '14', 'IsInteger', 6),
'Ignore': ('IntReg', 'uw', '16', 'IsInteger', 99),
#General Purpose Floating Point Reg Operands
'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 1),