add cycle to exit message

src/arch/mips/isa/formats/trap.isa:
    Take out fix that tried to fix trap
    instruction disassembly. It forces bad
    compile ..
configs/test/test.py:
    add 'cycle' to exit message

--HG--
extra : convert_revision : 568877797fd2806416b4cbb388cc3f7eb2492627

configs/test/test.py

@@ -50,5 +50,5 @@ m5.instantiate(root)
 # simulate until program terminates
 exit_event = m5.simulate()
 
-print 'Exiting @', m5.curTick(), 'because', exit_event.getCause()
+print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()
 

src/arch/mips/isa/formats/trap.isa

@@ -70,11 +70,9 @@ def template TrapExecute {{
 }};
 
 def format Trap(code, *flags) {{
-        warn_code = 'warn(\"'
-        warn_code += 'Trap Exception Handler Is Currently Not Implemented.'
-        warn_code += '\");'
-        code = warn_code + "bool " + code
-
+        code = 'warn(\"'
+        code += 'Trap Exception Handler Is Currently Not Implemented.'
+        code += '\");'
         iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
         header_output = BasicDeclare.subst(iop)
         decoder_output = BasicConstructor.subst(iop)