dev-arm: generateBasicPioDeviceNode requiring an ArmInterruptPin

Change-Id: I16ed3b689158defe2a43cccfa053d48dec4a1e41
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31941
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-07-29 11:50:36 +01:00
parent 4a309ae747
commit 78f2f4fd6d
3 changed files with 8 additions and 10 deletions

View File

@@ -57,14 +57,14 @@ class PioDevice(ClockedObject):
state.sizeCells(size) ))
if interrupts:
if any([i < 32 for i in interrupts]):
if any([i.num < 32 for i in interrupts]):
raise(("Interrupt number smaller than 32 "+
" in PioDevice %s") % name)
# subtracting 32 because Linux assumes that SPIs start at 0, while
# gem5 uses the internal GIC numbering (SPIs start at 32)
node.append(FdtPropertyWords("interrupts", sum(
[[0, i - 32, 4] for i in interrupts], []) ))
[[0, i.num - 32, 4] for i in interrupts], []) ))
return node

View File

@@ -373,7 +373,7 @@ class Pl011(Uart):
def generateDeviceTree(self, state):
node = self.generateBasicPioDeviceNode(state, 'uart', self.pio_addr,
0x1000, [int(self.interrupt.num)])
0x1000, [ self.interrupt ])
node.appendCompatible(["arm,pl011", "arm,primecell"])
# Hardcoded reference to the realview platform clocks, because the
@@ -409,7 +409,7 @@ Reference:
def generateDeviceTree(self, state):
node = self.generateBasicPioDeviceNode(state, 'watchdog',
self.pio_addr, 0x1000, [int(self.interrupt.num)])
self.pio_addr, 0x1000, [ self.interrupt ])
node.appendCompatible(['arm,sp805', 'arm,primecell'])
clocks = [state.phandle(self.clk_domain.unproxy(self))]
clock_names = ['wdogclk']
@@ -442,7 +442,7 @@ class PL031(AmbaIntDevice):
def generateDeviceTree(self, state):
node = self.generateBasicPioDeviceNode(state, 'rtc', self.pio_addr,
0x1000, [int(self.interrupt.num)])
0x1000, [ self.interrupt ])
node.appendCompatible(["arm,pl031", "arm,primecell"])
clock = state.phandle(self.clk_domain.unproxy(self))
@@ -460,7 +460,7 @@ class Pl050(AmbaIntDevice):
def generateDeviceTree(self, state):
node = self.generateBasicPioDeviceNode(state, 'kmi', self.pio_addr,
0x1000, [int(self.interrupt.num)])
0x1000, [ self.interrupt ])
node.appendCompatible(["arm,pl050", "arm,primecell"])
clock = state.phandle(self.clk_domain.unproxy(self))
@@ -523,7 +523,7 @@ class HDLcd(AmbaDmaDevice):
port_node.append(endpoint_node)
node = self.generateBasicPioDeviceNode(state, 'hdlcd',
self.pio_addr, 0x1000, [ self.interrupt.num ])
self.pio_addr, 0x1000, [ self.interrupt ])
node.appendCompatible(["arm,hdlcd"])
node.append(FdtPropertyWords("clocks", state.phandle(self.pxl_clk)))

View File

@@ -54,8 +54,6 @@ class MmioVirtIO(BasicPioDevice):
def generateDeviceTree(self, state):
node = self.generateBasicPioDeviceNode(state, 'virtio', self.pio_addr,
int(self.pio_size), [
int(self.interrupt.num),
])
int(self.pio_size), [ self.interrupt ])
node.appendCompatible(["virtio,mmio"])
yield node