Include ability to copy all misc regs.
arch/alpha/ev5.cc:
Include function for the MiscRegFile to copy all of the Iprs from an ExecContext.
arch/alpha/isa_traits.hh:
Include functions to copy MiscRegs from an ExecContext.
cpu/cpu_exec_context.cc:
Be sure to copy all of the misc regs when copying all architectural state.
--HG--
extra : convert_revision : cb948b5ff141ea0f739a1016f98236bd2a512f76
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@@ -541,6 +541,14 @@ AlphaISA::MiscRegFile::setIpr(int idx, uint64_t val, ExecContext *xc)
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return NoFault;
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}
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void
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AlphaISA::MiscRegFile::copyIprs(ExecContext *xc)
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{
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for (int i = IPR_Base_DepTag; i < NumInternalProcRegs; ++i) {
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ipr[i] = xc->readMiscReg(i);
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}
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}
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/**
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* Check for special simulator handling of specific PAL calls.
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* If return value is false, actual PAL call will be suppressed.
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@@ -169,6 +169,8 @@ extern const int reg_redir[NumIntRegs];
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Fault setRegWithEffect(int misc_reg, const MiscReg &val,
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ExecContext *xc);
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void copyMiscRegs(ExecContext *xc);
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#if FULL_SYSTEM
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protected:
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InternalProcReg ipr[NumInternalProcRegs]; // Internal processor regs
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@@ -177,6 +179,8 @@ extern const int reg_redir[NumIntRegs];
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MiscReg readIpr(int idx, Fault &fault, ExecContext *xc);
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Fault setIpr(int idx, uint64_t val, ExecContext *xc);
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void copyIprs(ExecContext *xc);
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#endif
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friend class RegFile;
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};
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@@ -289,15 +289,7 @@ CPUExecContext::copyArchRegs(ExecContext *xc)
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}
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// Copy misc. registers
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setMiscReg(AlphaISA::Fpcr_DepTag, xc->readMiscReg(AlphaISA::Fpcr_DepTag));
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setMiscReg(AlphaISA::Uniq_DepTag, xc->readMiscReg(AlphaISA::Uniq_DepTag));
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setMiscReg(AlphaISA::Lock_Flag_DepTag,
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xc->readMiscReg(AlphaISA::Lock_Flag_DepTag));
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setMiscReg(AlphaISA::Lock_Addr_DepTag,
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xc->readMiscReg(AlphaISA::Lock_Addr_DepTag));
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// Also need to copy all the IPRs. Probably should just have a copy misc
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// regs function defined on the misc regs.
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regs.miscRegs.copyMiscRegs(xc);
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// Lastly copy PC/NPC
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setPC(xc->readPC());
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