arch-x86,cpu-kvm: Move the x86 KVM CPU to the arch/x86 directory.

The x86 KVM CPU had been in the cpu/kvm directory, while the arm CPU was
inconsistently in the arch/arm directory.

This change moves the x86 CPU to be in arch/x86, restoring consistency.
This location will make the KVM support more modular, by not having the
x86 CPU implementation right alongside the generic implementation.

Change-Id: Ia13151f843df8f8877bfef5ff620825877d3dffa
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52085
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/x86/kvm/SConscript

@@ -0,0 +1,44 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+Import('*')
+
+if not env['USE_KVM'] or env['TARGET_ISA'] != env['KVM_ISA']:
+    Return()
+
+SimObject('X86KvmCPU.py', tags='x86 isa')
+Source('x86_cpu.cc', tags='x86 isa')

src/arch/x86/kvm/X86KvmCPU.py

@@ -31,7 +31,7 @@ from m5.objects.BaseKvmCPU import BaseKvmCPU
 
 class X86KvmCPU(BaseKvmCPU):
     type = 'X86KvmCPU'
-    cxx_header = "cpu/kvm/x86_cpu.hh"
+    cxx_header = "arch/x86/kvm/x86_cpu.hh"
     cxx_class = 'gem5::X86KvmCPU'
 
     cxx_exports = [

src/arch/x86/kvm/x86_cpu.cc

@@ -26,7 +26,7 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include "cpu/kvm/x86_cpu.hh"
+#include "arch/x86/kvm/x86_cpu.hh"
 
 #include <linux/kvm.h>
 
@@ -193,10 +193,12 @@ static void
 dumpKvm(const char *reg_name, const struct kvm_segment &seg)
 {
     inform("\t%s: @0x%llx+%x [sel: 0x%x, type: 0x%x]\n"
-           "\t\tpres.: %u, dpl: %u, db: %u, s: %u, l: %u, g: %u, avl: %u, unus.: %u\n",
+           "\t\tpres.: %u, dpl: %u, db: %u, s: %u, l: %u, g: %u, avl: %u, "
+           "unus.: %u\n",
            reg_name,
            seg.base, seg.limit, seg.selector, seg.type,
-           seg.present, seg.dpl, seg.db, seg.s, seg.l, seg.g, seg.avl, seg.unusable);
+           seg.present, seg.dpl, seg.db, seg.s, seg.l, seg.g, seg.avl,
+           seg.unusable);
 }
 
 static void
@@ -547,8 +549,8 @@ X86KvmCPU::X86KvmCPU(const X86KvmCPUParams &params)
     haveXCRs = kvm.capXCRs();
 
     if (useXSave && !haveXSave) {
-        warn("KVM: XSAVE not supported by host. MXCSR synchronization might be "
-             "unreliable due to kernel bugs.\n");
+        warn("KVM: XSAVE not supported by host. MXCSR synchronization might "
+             "be unreliable due to kernel bugs.\n");
         useXSave = false;
     } else if (!useXSave) {
         warn("KVM: XSave FPU/SIMD synchronization disabled by user.\n");
@@ -1321,7 +1323,8 @@ X86KvmCPU::handleKvmExitIO()
         handleIOMiscReg32(MISCREG_PCI_CONFIG_ADDRESS);
         return 0;
     } else if ((port & ~0x3) == IO_PCI_CONF_DATA_BASE) {
-        Addr pciConfigAddr(tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS));
+        Addr pciConfigAddr(tc->readMiscRegNoEffect(
+                    MISCREG_PCI_CONFIG_ADDRESS));
         if (pciConfigAddr & 0x80000000) {
             pAddr = X86ISA::x86PciConfigAddress((pciConfigAddr & 0x7ffffffc) |
                                                 (port & 0x3));
@@ -1473,7 +1476,8 @@ void
 X86KvmCPU::setCPUID(const Kvm::CPUIDVector &cpuid)
 {
     std::unique_ptr<struct kvm_cpuid2> kvm_cpuid(
-        newVarStruct<struct kvm_cpuid2, struct kvm_cpuid_entry2>(cpuid.size()));
+        newVarStruct<struct kvm_cpuid2, struct kvm_cpuid_entry2>(
+            cpuid.size()));
 
     kvm_cpuid->nent = cpuid.size();
     std::copy(cpuid.begin(), cpuid.end(), kvm_cpuid->entries);

src/cpu/kvm/SConscript

@@ -49,9 +49,6 @@ Source('vm.cc')
 Source('perfevent.cc')
 Source('timer.cc')
 
-SimObject('X86KvmCPU.py', tags='x86 isa')
-Source('x86_cpu.cc', tags='x86 isa')
-
 DebugFlag('Kvm', 'Basic KVM Functionality')
 DebugFlag('KvmContext', 'KVM/gem5 context synchronization')
 DebugFlag('KvmIO', 'KVM MMIO diagnostics')