arch-arm: CNTHCTL trap to EL2 only if ARMv8.6-ECV implemented
In condGenericTimerCommonEL1SystemAccessTrapEL2 we were trapping accesses to the EL1 virtual timer/counter registers to EL2, not considering that this feature is part of ARMv8.6-ECV only (not supported at the moment) Change-Id: Ic03bcae436a105fb139a74126881b665ee08c912 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Adrian Herrera <adrian.herrera@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27408 Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -115,6 +115,7 @@ namespace ArmISA
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EndBitUnion(AA64ISAR1)
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BitUnion64(AA64MMFR0)
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Bitfield<63, 60> ecv;
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Bitfield<47, 44> exs;
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Bitfield<43, 40> tgran4_2;
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Bitfield<39, 36> tgran64_2;
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@@ -1086,6 +1086,7 @@ bool
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condGenericTimerCommonEL1SystemAccessTrapEL2(const MiscRegIndex miscReg,
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ThreadContext *tc)
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{
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const AA64MMFR0 mmfr0 = tc->readMiscRegNoEffect(MISCREG_ID_AA64MMFR0_EL1);
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const HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2);
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const RegVal cnthctl_val = tc->readMiscReg(MISCREG_CNTHCTL_EL2);
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const CNTHCTL cnthctl = cnthctl_val;
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@@ -1096,13 +1097,19 @@ condGenericTimerCommonEL1SystemAccessTrapEL2(const MiscRegIndex miscReg,
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return hcr.e2h ? !cnthctl_e2h.el1pcten : !cnthctl.el1pcten;
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case MISCREG_CNTVCT:
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case MISCREG_CNTVCT_EL0:
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return hcr.e2h ? cnthctl_e2h.el1tvct : cnthctl.el1tvct;
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if (!mmfr0.ecv)
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return false;
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else
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return hcr.e2h ? cnthctl_e2h.el1tvct : cnthctl.el1tvct;
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case MISCREG_CNTP_CTL ... MISCREG_CNTP_TVAL_S:
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case MISCREG_CNTP_CTL_EL0 ... MISCREG_CNTP_TVAL_EL0:
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return hcr.e2h ? !cnthctl_e2h.el1pten : false;
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case MISCREG_CNTV_CTL ... MISCREG_CNTV_TVAL:
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case MISCREG_CNTV_CTL_EL0 ... MISCREG_CNTV_TVAL_EL0:
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return hcr.e2h ? cnthctl_e2h.el1tvt : cnthctl.el1tvt;
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if (!mmfr0.ecv)
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return false;
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else
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return hcr.e2h ? cnthctl_e2h.el1tvt : cnthctl.el1tvt;
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default:
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break;
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}
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