cpu: add a new instruction type 'Atomic'

This patch adds a new flag named 'Atomic' to support ISA implementations
that use AtomicOpFunctor to handle atomic instructions instead of a
pair of locking load and unlocking store.

Change-Id: I1fbee6e54432396cb49dfc59ad9006b75812d115
Reviewed-on: https://gem5-review.googlesource.com/8187
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
This commit is contained in:
Tuan Ta
2018-02-12 23:19:50 -05:00
parent 78fb2c1a5d
commit 7341f14f14
3 changed files with 3 additions and 0 deletions

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@@ -64,6 +64,7 @@ class StaticInstFlags(Enum):
'IsMemRef', # References memory (load, store, or prefetch)
'IsLoad', # Reads from memory (load or prefetch).
'IsStore', # Writes to memory.
'IsAtomic', # Does atomic RMW to memory.
'IsStoreConditional', # Store conditional instruction.
'IsIndexed', # Accesses memory with an indexed address
# computation

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@@ -505,6 +505,7 @@ class BaseDynInst : public ExecContext, public RefCounted
bool isMemRef() const { return staticInst->isMemRef(); }
bool isLoad() const { return staticInst->isLoad(); }
bool isStore() const { return staticInst->isStore(); }
bool isAtomic() const { return staticInst->isAtomic(); }
bool isStoreConditional() const
{ return staticInst->isStoreConditional(); }
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }

View File

@@ -144,6 +144,7 @@ class StaticInst : public RefCounted, public StaticInstFlags
bool isMemRef() const { return flags[IsMemRef]; }
bool isLoad() const { return flags[IsLoad]; }
bool isStore() const { return flags[IsStore]; }
bool isAtomic() const { return flags[IsAtomic]; }
bool isStoreConditional() const { return flags[IsStoreConditional]; }
bool isInstPrefetch() const { return flags[IsInstPrefetch]; }
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }