dev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1

Add an ARM-specific VirtIO MMIO device to the VExpress_GEM5_V1
platform.

Change-Id: Id1e75398e039aad9d637f46f653cda9084d3d2fe
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2327
This commit is contained in:
Andreas Sandberg
2017-03-24 13:56:14 +00:00
parent c5c71a7516
commit 6f84c91c74
2 changed files with 26 additions and 1 deletions

View File

@@ -63,6 +63,7 @@ from SubSystem import SubSystem
from Graphics import ImageFormat
from ClockedObject import ClockedObject
from PS2 import *
from VirtIOMMIO import MmioVirtIO
# Platforms with KVM support should generally use in-kernel GIC
# emulation. Use a GIC model that automatically switches between
@@ -1045,6 +1046,8 @@ Memory map:
0x1c0a0000-0x1c0affff: UART1 (reserved)
0x1c0b0000-0x1c0bffff: UART2 (reserved)
0x1c0c0000-0x1c0cffff: UART3 (reserved)
0x1c130000-0x1c13ffff: VirtIO (gem5/FM extension)
0x1c140000-0x1c14ffff: VirtIO (gem5/FM extension)
0x1c170000-0x1c17ffff: RTC
0x20000000-0x3fffffff: On-chip peripherals:
@@ -1089,6 +1092,8 @@ Interrupts:
48 : Reserved (USB)
95-255: On-chip interrupt sources (we use these for
gem5-specific devices, SPIs)
74 : VirtIO (gem5/FM extension)
75 : VirtIO (gem5/FM extension)
95 : HDLCD
96- 98: GPU (reserved)
100-103: PCI
@@ -1154,6 +1159,12 @@ Interrupts:
energy_ctrl = EnergyCtrl(pio_addr=0x10000000)
vio = [
MmioVirtIO(pio_addr=0x1c130000, pio_size=0x1000,
interrupt=ArmSPI(num=74)),
MmioVirtIO(pio_addr=0x1c140000, pio_size=0x1000,
interrupt=ArmSPI(num=75)),
]
def _off_chip_devices(self):
return [
@@ -1165,6 +1176,8 @@ Interrupts:
self.pci_host,
self.energy_ctrl,
self.clock24MHz,
self.vio[0],
self.vio[1],
]
def attachPciDevice(self, device, *args, **kwargs):

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016 ARM Limited
* Copyright (c) 2015-2017 ARM Limited
* All rights reserved
*
* Redistribution and use in source and binary forms, with or without
@@ -140,6 +140,18 @@
#gpio-cells = <2>;
};
vio@1c130000 {
compatible = "virtio,mmio";
reg = <0 0x1c130000 0x0 0x1000>;
interrupts = <0 42 4>;
};
vio@1c140000 {
compatible = "virtio,mmio";
reg = <0 0x1c140000 0x0 0x1000>;
interrupts = <0 43 4>;
};
dcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;