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mem-ruby: Fix replacement policy in GPU_VIPER (#1564)

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The current GPU_VIPER protocol's TCC cache update the MRU information
twice with calling a_allocateBlock and ut_updateTag which affects the
LIP and RRIP replacement polies. Remove ut_updateTag fixes the LIP and
RRIP replacement polies.

Change-Id: I79ad9392593e00425a7fe8828048465b2c2c2e1f
This commit is contained in:
Matt Sinclair
2024-09-17 12:16:09 -05:00
committed by GitHub
parent 3feeb5724f c1fcc0c54a
commit 6d49130b0b
1 changed files with 0 additions and 2 deletions
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2
src/mem/ruby/protocol/GPU_VIPER-TCC.sm
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@@ -1162,7 +1162,6 @@ machine(MachineType:TCC, "TCC Cache")
transition(I, WrVicBlkBack, W) {TagArrayRead, TagArrayWrite, DataArrayWrite} { transition(I, WrVicBlkBack, W) {TagArrayRead, TagArrayWrite, DataArrayWrite} {
p_profileMiss; p_profileMiss;
a_allocateBlock; a_allocateBlock;
ut_updateTag;
swb_sendWBAck; swb_sendWBAck;
wdb_writeDirtyBytes; wdb_writeDirtyBytes;
p_popRequestQueue; p_popRequestQueue;
@@ -1257,7 +1256,6 @@ machine(MachineType:TCC, "TCC Cache")
transition(IV, Data, V) {TagArrayRead, TagArrayWrite, DataArrayWrite} { transition(IV, Data, V) {TagArrayRead, TagArrayWrite, DataArrayWrite} {
a_allocateBlock; a_allocateBlock;
ut_updateTag;
wcb_writeCacheBlock; wcb_writeCacheBlock;
sdr_sendDataResponse; sdr_sendDataResponse;
wada_wakeUpAllDependentsAddr; wada_wakeUpAllDependentsAddr;