tests: add riscv to cpu tests
Change-Id: Id8e767afbb74f79b980d8160eefc13e7f529f1c3 Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16889 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
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@@ -38,6 +38,7 @@ workloads = ('Bubblesort','FloatMM')
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valid_isas = {
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'x86': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'DerivO3CPU'),
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'arm': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'MinorCPU', 'DerivO3CPU'),
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'riscv': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'MinorCPU', 'DerivO3CPU'),
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}
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