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mem: Add a header latency parameter to the XBar

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The XBar uses the concept of Layers to model throughput and
instantiates one Layer per master. As it forwards a packet to and from
master, the corresponding Layer is marked as occupied for a number of
cycles. Requests/responses to/from a master are blocked while the
corresponding Layer is occupied. Previously the delay would be
calculated based on the formula 1 + size / width, which assumes that
the Layer is always occupied for 1 cycle while processing the packet
header. This changes makes the header latency a parameter which
defaults to 1.

Change-Id: I12752ab4415617a94fbd8379bcd2ae8982f91fd8
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30054
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Nikos Nikoleris
2020-05-14 11:10:07 +01:00
parent ceb93d2182
commit 6a4b69c4fd
4 changed files with 15 additions and 7 deletions
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7
src/mem/XBar.py
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@@ -1,4 +1,4 @@
# Copyright (c) 2012, 2015, 2017, 2019 ARM Limited
# Copyright (c) 2012, 2015, 2017, 2019-2020 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -68,6 +68,11 @@ class BaseXBar(ClockedObject):
forward_latency = Param.Cycles("Forward latency")
response_latency = Param.Cycles("Response latency")
# The XBar uses one Layer per master. Each Layer forwards a packet
# to its destination and is occupied for header_latency + size /
# width cycles
header_latency = Param.Cycles(1, "Header latency")
# Width governing the throughput of the crossbar
width = Param.Unsigned("Datapath width per port (bytes)")

8
src/mem/coherent_xbar.cc
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2019 ARM Limited
* Copyright (c) 2011-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -180,7 +180,7 @@ CoherentXBar::recvTimingReq(PacketPtr pkt, PortID slave_port_id)
calcPacketTiming(pkt, xbar_delay);
// determine how long to be crossbar layer is busy
Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay;
Tick packetFinishTime = clockEdge(headerLatency) + pkt->payloadDelay;
// is this the destination point for this packet? (e.g. true if
// this xbar is the PoC for a cache maintenance operation to the
@@ -471,7 +471,7 @@ CoherentXBar::recvTimingResp(PacketPtr pkt, PortID master_port_id)
calcPacketTiming(pkt, xbar_delay);
// determine how long to be crossbar layer is busy
Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay;
Tick packetFinishTime = clockEdge(headerLatency) + pkt->payloadDelay;
if (snoopFilter && !system->bypassCaches()) {
// let the snoop filter inspect the response and update its state
@@ -619,7 +619,7 @@ CoherentXBar::recvTimingSnoopResp(PacketPtr pkt, PortID slave_port_id)
calcPacketTiming(pkt, xbar_delay);
// determine how long to be crossbar layer is busy
Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay;
Tick packetFinishTime = clockEdge(headerLatency) + pkt->payloadDelay;
// forward it either as a snoop response or a normal response
if (forwardAsSnoop) {

3
src/mem/xbar.cc
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2015, 2018-2019 ARM Limited
* Copyright (c) 2011-2015, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -56,6 +56,7 @@ BaseXBar::BaseXBar(const BaseXBarParams *p)
frontendLatency(p->frontend_latency),
forwardLatency(p->forward_latency),
responseLatency(p->response_latency),
headerLatency(p->header_latency),
width(p->width),
gotAddrRanges(p->port_default_connection_count +
p->port_master_connection_count, false),

4
src/mem/xbar.hh
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2015, 2018-2019 ARM Limited
* Copyright (c) 2011-2015, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -307,6 +307,8 @@ class BaseXBar : public ClockedObject
const Cycles frontendLatency;
const Cycles forwardLatency;
const Cycles responseLatency;
/** Cycles the layer is occupied processing the packet header */
const Cycles headerLatency;
/** the width of the xbar in bytes */
const uint32_t width;