cpu-minor: Add control instruction statistics to MinorCPU

Add control/branch instructions committed stat to Minor CPU. The stats
can be found in board.processor.cores.core.committedControl_0 in
stats.txt. The stats counted are IsControl, IsDirectControl,
IsIndirectControl, IsCondControl, IsUncondControl, IsCall, and IsReturn.
IsControl tracks the total control/branch instructions committed.

Use inst->staticInst->isControl() flag to determine if an instruction is
a control or not, and then using other flags in the StaticInstFlags to
determine the type of control instruction and tracking the committed
ones.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1283

Change-Id: Iee1010fdf0fa4078ebe1c56b437295abdb5f4469
Co-authored-by: Kunal Pai <kunpai@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63358
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: ZHENGRONG WANG <seanyukigeek@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Jasjeet Rangi
2022-09-08 15:03:45 -07:00
parent f7cf47bc31
commit 6807f70b81
3 changed files with 45 additions and 1 deletions

View File

@@ -883,6 +883,39 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst)
cpu.stats.committedInstType[inst->id.threadId]
[inst->staticInst->opClass()]++;
/** Add a count for every control instruction */
if (inst->staticInst->isControl()) {
if (inst->staticInst->isReturn()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsReturn]++;
}
if (inst->staticInst->isCall()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsCall]++;
}
if (inst->staticInst->isDirectCtrl()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsDirectControl]++;
}
if (inst->staticInst->isIndirectCtrl()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsIndirectControl]++;
}
if (inst->staticInst->isCondCtrl()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsCondControl]++;
}
if (inst->staticInst->isUncondCtrl()) {
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsUncondControl]++;
}
cpu.stats.committedControl[inst->id.threadId]
[gem5::StaticInstFlags::Flags::IsControl]++;
}
/* Set the CP SeqNum to the numOps commit number */
if (inst->traceData)
inst->traceData->setCPSeq(thread->numOp);

View File

@@ -65,7 +65,10 @@ MinorStats::MinorStats(BaseCPU *base_cpu)
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: instructions per cycle"),
ADD_STAT(committedInstType, statistics::units::Count::get(),
"Class of committed instruction")
"Class of committed instruction"),
ADD_STAT(committedControl, statistics::units::Count::get(),
"Class of control type instructions committed")
{
quiesceCycles.prereq(quiesceCycles);
@@ -79,6 +82,11 @@ MinorStats::MinorStats(BaseCPU *base_cpu)
.init(base_cpu->numThreads, enums::Num_OpClass)
.flags(statistics::total | statistics::pdf | statistics::dist);
committedInstType.ysubnames(enums::OpClassStrings);
committedControl
.init(base_cpu->numThreads, StaticInstFlags::Flags::Num_Flags)
.flags(statistics::nozero);
committedControl.ysubnames(StaticInstFlags::FlagsStrings);
}
} // namespace minor

View File

@@ -82,6 +82,9 @@ struct MinorStats : public statistics::Group
/** Number of instructions by type (OpClass) */
statistics::Vector2d committedInstType;
/** Number of branches commited */
statistics::Vector2d committedControl;
};
} // namespace minor