mem-ruby, gpu-compute: add hit/miss profiling to SQC
This commit updates the Ruby SQC (GPU L1 I$) to perform hit and miss profiling on each request that reaches it. Change-Id: I736521b89b5d37d950265f32cf1a6d2ee5316dba Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60651 Maintainer: Matthew Poremba <matthew.poremba@amd.com> Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -291,28 +291,42 @@ machine(MachineType:SQC, "GPU SQC (L1 I Cache)")
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}
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}
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// added for profiling
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action(uu_profileDataMiss, "\udm", desc="Profile SQC demand miss"){
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L1cache.profileDemandMiss();
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}
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action(uu_profileDataHit, "\udh", desc="Profile SQC demand hit"){
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L1cache.profileDemandHit();
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}
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// Transitions
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// transitions from base
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transition({I, V}, Repl, I) {TagArrayRead, TagArrayWrite} {
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ic_invCache
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// since we're evicting something, don't bother classifying as hit/miss
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ic_invCache;
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}
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transition(I, Data, V) {TagArrayRead, TagArrayWrite, DataArrayRead} {
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a_allocate;
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w_writeCache
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// don't profile this as a hit/miss since it's a reponse from L2,
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// so we already counted it
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w_writeCache;
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l_loadDone;
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pr_popResponseQueue;
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}
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transition(I, Fetch) {TagArrayRead, TagArrayWrite} {
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nS_issueRdBlkS;
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uu_profileDataMiss; // since line wasn't in SQC, we missed
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p_popMandatoryQueue;
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}
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// simple hit transitions
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transition(V, Fetch) {TagArrayRead, DataArrayRead} {
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l_loadDone;
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uu_profileDataHit; // line was in SQC, so we hit
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p_popMandatoryQueue;
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}
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}
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