arch-arm: Cache the highestEL in the ISA object

This is for fast retrieval of the highest implemented
exception level

Change-Id: Id631c2b999d46a8b79570e4043ae04bc2b2e7531
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>

src/arch/arm/isa.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2023 Arm Limited
+ * Copyright (c) 2010-2024 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -106,6 +106,7 @@ ISA::ISA(const Params &p) : BaseISA(p, "arm"), system(NULL),
     // Cache system-level properties
     if (FullSystem && system) {
         highestELIs64 = system->highestELIs64();
+        highestEL = system->highestEL();
         haveLargeAsid64 = system->haveLargeAsid64();
         physAddrRange = system->physAddrRange();
         sveVL = system->sveVL();
@@ -114,6 +115,7 @@ ISA::ISA(const Params &p) : BaseISA(p, "arm"), system(NULL),
         release = system->releaseFS();
     } else {
         highestELIs64 = true; // ArmSystem::highestELIs64 does the same
+        highestEL = EL1; // ArmSystem::highestEL does the same
         haveLargeAsid64 = false;
         physAddrRange = 32;  // dummy value
         sveVL = p.sve_vl_se;

src/arch/arm/isa.hh

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2023 Arm Limited
+ * Copyright (c) 2010, 2012-2024 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -90,6 +90,7 @@ namespace ArmISA
 
         // Cached copies of system-level properties
         bool highestELIs64;
+        ExceptionLevel highestEL;
         bool haveLargeAsid64;
         uint8_t physAddrRange;