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More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).

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Also missed renames in a bunch of config files somehow.
(See previous changeset for list of renames.)

arch/alpha/alpha_memory.cc:
arch/alpha/ev5.cc:
arch/alpha/faults.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
    More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).

--HG--
extra : convert_revision : b2c6ca0916b72b59895520fcacaf028667560a0d
This commit is contained in:
Steve Reinhardt
2004-04-03 13:46:10 -08:00
parent b3b0a4705b
commit 65205b82ac
6 changed files with 23 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/alpha/alpha_memory.cc
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@@ -465,7 +465,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
req->xc);
if (write) { write_acv++; } else { read_acv++; }
return Dtb_Fault_Fault;
return DTB_Fault_Fault;
}
// Check for "superpage" mapping: when SP<1> is set, and
@@ -480,7 +480,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK),
req->xc);
if (write) { write_acv++; } else { read_acv++; }
return Dtb_Acv_Fault;
return DTB_Acv_Fault;
}
req->paddr = req->vaddr & PA_IMPL_MASK;
@@ -512,13 +512,13 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
(pte->fonw ? MM_STAT_FONW_MASK : 0),
req->xc);
write_acv++;
return Dtb_Fault_Fault;
return DTB_Fault_Fault;
}
if (pte->fonw) {
fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK,
req->xc);
write_acv++;
return Dtb_Fault_Fault;
return DTB_Fault_Fault;
}
} else {
if (!(pte->xre & MODE2MASK(mode))) {
@@ -527,12 +527,12 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
(pte->fonr ? MM_STAT_FONR_MASK : 0),
req->xc);
read_acv++;
return Dtb_Acv_Fault;
return DTB_Acv_Fault;
}
if (pte->fonr) {
fault(req->vaddr, MM_STAT_FONR_MASK, req->xc);
read_acv++;
return Dtb_Fault_Fault;
return DTB_Fault_Fault;
}
}
}

10
arch/alpha/ev5.cc
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@@ -68,11 +68,11 @@ AlphaISA::fault_addr[Num_Faults] = {
0x0201, /* Ndtb_Miss_Fault */
0x0281, /* Pdtb_Miss_Fault */
0x0301, /* Alignment_Fault */
0x0381, /* Dtb_Fault_Fault */
0x0381, /* Dtb_Acv_Fault */
0x0181, /* Itb_Miss_Fault */
0x0181, /* Itb_Fault_Fault */
0x0081, /* Itb_Acv_Fault */
0x0381, /* DTB_Fault_Fault */
0x0381, /* DTB_Acv_Fault */
0x0181, /* ITB_Miss_Fault */
0x0181, /* ITB_Fault_Fault */
0x0081, /* ITB_Acv_Fault */
0x0481, /* Unimplemented_Opcode_Fault */
0x0581, /* Fen_Fault */
0x2001, /* Pal_Fault */

10
arch/alpha/faults.hh
View File

@@ -38,11 +38,11 @@ enum Fault {
Ndtb_Miss_Fault, // DTB miss
Pdtb_Miss_Fault, // nested DTB miss
Alignment_Fault, // unaligned access
Dtb_Fault_Fault, // DTB page fault
Dtb_Acv_Fault, // DTB access violation
Itb_Miss_Fault, // ITB miss
Itb_Fault_Fault, // ITB page fault
Itb_Acv_Fault, // ITB access violation
DTB_Fault_Fault, // DTB page fault
DTB_Acv_Fault, // DTB access violation
ITB_Miss_Fault, // ITB miss
ITB_Fault_Fault, // ITB page fault
ITB_Acv_Fault, // ITB access violation
Unimplemented_Opcode_Fault, // invalid/unimplemented instruction
Fen_Fault, // FP not-enabled fault
Pal_Fault, // call_pal S/W interrupt

2
cpu/exec_context.cc
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@@ -42,7 +42,7 @@ using namespace std;
// constructor
#ifdef FULL_SYSTEM
ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
AlphaItb *_itb, AlphaDtb *_dtb,
AlphaITB *_itb, AlphaDTB *_dtb,
FunctionalMemory *_mem)
: _status(ExecContext::Unallocated),
kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num),

6
cpu/exec_context.hh
View File

@@ -124,8 +124,8 @@ class ExecContext
#ifdef FULL_SYSTEM
FunctionalMemory *mem;
AlphaItb *itb;
AlphaDtb *dtb;
AlphaITB *itb;
AlphaDTB *dtb;
System *system;
// the following two fields are redundant, since we can always
@@ -174,7 +174,7 @@ class ExecContext
// constructor: initialize context from given process structure
#ifdef FULL_SYSTEM
ExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
AlphaItb *_itb, AlphaDtb *_dtb, FunctionalMemory *_dem);
AlphaITB *_itb, AlphaDTB *_dtb, FunctionalMemory *_dem);
#else
ExecContext(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid);
ExecContext(BaseCPU *_cpu, int _thread_num, FunctionalMemory *_mem,

6
cpu/simple_cpu/simple_cpu.hh
View File

@@ -40,8 +40,8 @@
#ifdef FULL_SYSTEM
class Processor;
class Kernel;
class AlphaItb;
class AlphaDtb;
class AlphaITB;
class AlphaDTB;
class PhysicalMemory;
class RemoteGDB;
@@ -131,7 +131,7 @@ class SimpleCPU : public BaseCPU
System *_system,
Counter max_insts_any_thread, Counter max_insts_all_threads,
Counter max_loads_any_thread, Counter max_loads_all_threads,
AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem,
AlphaITB *itb, AlphaDTB *dtb, FunctionalMemory *mem,
MemInterface *icache_interface, MemInterface *dcache_interface,
bool _def_reg, Tick freq);