ARM: Decode the VMRS instruction.
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@@ -255,9 +255,29 @@ def format ShortFpTransfer() {{
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// A8-648
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return new WarnUnimplemented("vmov", machInst);
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} else if (a == 7) {
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// A8-658
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// B6-27
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return new WarnUnimplemented("vmrs", machInst);
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const IntRegIndex rt =
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(IntRegIndex)(uint32_t)bits(machInst, 15, 12);
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uint32_t specReg = bits(machInst, 19, 16);
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switch (specReg) {
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case 0:
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specReg = MISCREG_FPSID;
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break;
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case 1:
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specReg = MISCREG_FPSCR;
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break;
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case 6:
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specReg = MISCREG_MVFR1;
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break;
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case 7:
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specReg = MISCREG_MVFR0;
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break;
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case 8:
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specReg = MISCREG_FPEXC;
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break;
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default:
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return new Unknown(machInst);
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}
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return new Vmrs(machInst, rt, (IntRegIndex)specReg);
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}
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} else {
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// A8-646
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