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dev-amdgpu: Handle ring buffer wrap for PM4 queue

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Change-Id: I27bc274327838add709423b072d437c4e727a714
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65431
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
This commit is contained in:
Matthew Poremba
2022-11-08 14:24:32 -08:00
parent 90046bae6f
commit 623e2d3dac
4 changed files with 18 additions and 4 deletions
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13
src/dev/amdgpu/pm4_packet_processor.cc
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@@ -147,8 +147,8 @@ PM4PacketProcessor::newQueue(QueueDesc *mqd, Addr offset,
gpuDevice->setDoorbellType(offset, qt);
DPRINTF(PM4PacketProcessor, "New PM4 queue %d, base: %p offset: %p, me: "
"%d, pipe %d queue: %d\n", id, q->base(), q->offset(), q->me(),
q->pipe(), q->queue());
"%d, pipe %d queue: %d size: %d\n", id, q->base(), q->offset(),
q->me(), q->pipe(), q->queue(), q->size());
}
void
@@ -790,6 +790,9 @@ PM4PacketProcessor::writeMMIO(PacketPtr pkt, Addr mmio_offset)
case mmCP_HQD_PQ_WPTR_POLL_ADDR_HI:
setHqdPqWptrPollAddrHi(pkt->getLE<uint32_t>());
break;
case mmCP_HQD_PQ_CONTROL:
setHqdPqControl(pkt->getLE<uint32_t>());
break;
case mmCP_HQD_IB_CONTROL:
setHqdIbCtrl(pkt->getLE<uint32_t>());
break;
@@ -911,6 +914,12 @@ PM4PacketProcessor::setHqdPqWptrPollAddrHi(uint32_t data)
kiq.hqd_pq_wptr_poll_addr_hi = data;
}
void
PM4PacketProcessor::setHqdPqControl(uint32_t data)
{
kiq.hqd_pq_control = data;
}
void
PM4PacketProcessor::setHqdIbCtrl(uint32_t data)
{