arch-gcn3: Fix s_getpc operand information

s_getpc was currently reporting only a single operand,
and was only considering the SSRC operand. However,
this instruction' source is implicitly the PC.
Because its destination register was never tracked for
dependence checking purposes, dependence violations
are possible.

Change-Id: Ia80b8b3e24d5885f646a9ee41212a2cb35b9ffe6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29954
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
This commit is contained in:
Tony Gutierrez
2018-11-07 13:46:12 -05:00
committed by Anthony Gutierrez
parent a0cfd8da6b
commit 5dc5d23b79
2 changed files with 15 additions and 10 deletions

View File

@@ -5846,9 +5846,7 @@ namespace Gcn3ISA
getOperandSize(int opIdx) override
{
switch (opIdx) {
case 0: //ssrc
return 8;
case 1: //sdst
case 0: //sdst
return 8;
default:
fatal("op idx %i out of bounds\n", opIdx);
@@ -5860,9 +5858,7 @@ namespace Gcn3ISA
isSrcOperand(int opIdx) override
{
switch (opIdx) {
case 0: //ssrc
return true;
case 1: //sdst
case 0: //sdst
return false;
default:
fatal("op idx %i out of bounds\n", opIdx);
@@ -5874,9 +5870,7 @@ namespace Gcn3ISA
isDstOperand(int opIdx) override
{
switch (opIdx) {
case 0: //ssrc
return false;
case 1: //sdst
case 0: //sdst
return true;
default:
fatal("op idx %i out of bounds\n", opIdx);

View File

@@ -326,7 +326,12 @@ namespace Gcn3ISA
switch (opIdx) {
case 0:
return isScalarReg(instData.SSRC0);
if (instData.OP == 0x1C) {
// Special case for s_getpc, which has no source reg.
// Instead, it implicitly reads the PC.
return isScalarReg(instData.SDST);
}
return isScalarReg(instData.SSRC0);
case 1:
return isScalarReg(instData.SDST);
default:
@@ -353,6 +358,12 @@ namespace Gcn3ISA
switch (opIdx) {
case 0:
if (instData.OP == 0x1C) {
// Special case for s_getpc, which has no source reg.
// Instead, it implicitly reads the PC.
return opSelectorToRegIdx(instData.SDST,
gpuDynInst->wavefront()->reservedScalarRegs);
}
return opSelectorToRegIdx(instData.SSRC0,
gpuDynInst->wavefront()->reservedScalarRegs);
case 1: