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sim: Remove the syscall gem5 op.

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This is now handled by the workload "event" gem5 op.

Change-Id: Ibc195fde14a6174d1978bf280c349ca895e7fda3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34164
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-10-20 17:37:22 -07:00
parent 92abe28af4
commit 5d923ab5d0
4 changed files with 0 additions and 18 deletions
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2
include/gem5/asm/generic/m5ops.h
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@@ -76,7 +76,6 @@
#define M5OP_WORK_BEGIN 0x5a
#define M5OP_WORK_END 0x5b
#define M5OP_SE_SYSCALL 0x60
#define M5OP_SE_PAGE_FAULT 0x61
#define M5OP_DIST_TOGGLE_SYNC 0x62
@@ -108,7 +107,6 @@
M5OP(m5_panic, M5OP_PANIC) \
M5OP(m5_work_begin, M5OP_WORK_BEGIN) \
M5OP(m5_work_end, M5OP_WORK_END) \
M5OP(m5_se_syscall, M5OP_SE_SYSCALL) \
M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT) \
M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC) \
M5OP(m5_workload, M5OP_WORKLOAD) \

1
include/gem5/m5ops.h
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@@ -65,7 +65,6 @@ void m5_panic(void);
void m5_work_begin(uint64_t workid, uint64_t threadid);
void m5_work_end(uint64_t workid, uint64_t threadid);
void m5_se_syscall();
void m5_se_page_fault();
/*

11
src/sim/pseudo_inst.cc
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@@ -471,17 +471,6 @@ switchcpu(ThreadContext *tc)
exitSimLoop("switchcpu");
}
/*
* This function is executed when the simulation is executing the syscall
* handler in System Emulation mode.
*/
void
m5Syscall(ThreadContext *tc)
{
DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
tc->getSystemPtr()->workload->syscall(tc);
}
void
togglesync(ThreadContext *tc)
{

4
src/sim/pseudo_inst.hh
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@@ -242,10 +242,6 @@ pseudoInstWork(ThreadContext *tc, uint8_t func, uint64_t &result)
return false;
/* SE mode functions */
case M5OP_SE_SYSCALL:
invokeSimcall<ABI>(tc, m5Syscall);
return true;
case M5OP_SE_PAGE_FAULT:
invokeSimcall<ABI>(tc, TheISA::m5PageFault);
return true;